Date: Thu, 30 May 2019 01:24:47 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r348378 - head/sys/arm64/arm64 Message-ID: <201905300124.x4U1OlP4087035@repo.freebsd.org>
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Author: jchandra Date: Thu May 30 01:24:47 2019 New Revision: 348378 URL: https://svnweb.freebsd.org/changeset/base/348378 Log: gicv3_its: refactor LPI init into a new function Move the per-cpu LPI intialization to a separate function. This is in preparation for a commit that does LPI init only once for a CPU, even when there are multiple ITS blocks associated with the CPU. No functional changes in this commit. Reviewed by: andrew Differential Revision: https://reviews.freebsd.org/D19843 Modified: head/sys/arm64/arm64/gicv3_its.c Modified: head/sys/arm64/arm64/gicv3_its.c ============================================================================== --- head/sys/arm64/arm64/gicv3_its.c Thu May 30 01:21:08 2019 (r348377) +++ head/sys/arm64/arm64/gicv3_its.c Thu May 30 01:24:47 2019 (r348378) @@ -574,26 +574,17 @@ gicv3_its_pendtables_init(struct gicv3_its_softc *sc) } } -static int -its_init_cpu(device_t dev, struct gicv3_its_softc *sc) +static void +its_init_cpu_lpi(device_t dev, struct gicv3_its_softc *sc) { - struct redist_pcpu *rpcpu; device_t gicv3; - vm_paddr_t target; uint64_t xbaser, tmp; uint32_t ctlr; u_int cpuid; gicv3 = device_get_parent(dev); cpuid = PCPU_GET(cpuid); - if (!CPU_ISSET(cpuid, &sc->sc_cpus)) - return (0); - /* Check if the ITS is enabled on this CPU */ - if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0) { - return (ENXIO); - } - /* Disable LPIs */ ctlr = gic_r_read_4(gicv3, GICR_CTLR); ctlr &= ~GICR_CTLR_LPI_ENABLE; @@ -662,6 +653,26 @@ its_init_cpu(device_t dev, struct gicv3_its_softc *sc) /* Make sure the GIC has seen everything */ dsb(sy); +} + +static int +its_init_cpu(device_t dev, struct gicv3_its_softc *sc) +{ + device_t gicv3; + vm_paddr_t target; + u_int cpuid; + struct redist_pcpu *rpcpu; + + gicv3 = device_get_parent(dev); + cpuid = PCPU_GET(cpuid); + if (!CPU_ISSET(cpuid, &sc->sc_cpus)) + return (0); + + /* Check if the ITS is enabled on this CPU */ + if ((gic_r_read_4(gicv3, GICR_TYPER) & GICR_TYPER_PLPIS) == 0) + return (ENXIO); + + its_init_cpu_lpi(dev, sc); if ((gic_its_read_8(sc, GITS_TYPER) & GITS_TYPER_PTA) != 0) { /* This ITS wants the redistributor physical address */
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