Date: Thu, 6 Mar 2008 02:46:22 +0300 From: Stanislav Sedov <stas@FreeBSD.org> To: Rafal Jaworowski <raj@FreeBSD.org> Cc: cvs-src@FreeBSD.org, src-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/conf options.powerpc src/sys/dev/uart uart.h uart_bus_ocp.c uart_cpu_powerpc.c src/sys/kern subr_witness.c src/sys/powerpc/booke clock.c copyinout.c interrupt.c locore.S machdep.c pmap.c support.S swtch.S trap.c trap_subr.S ... Message-ID: <20080305234622.GC83691@dracon.ht-systems.ru> In-Reply-To: <200803031717.m23HH18K068262@repoman.freebsd.org> References: <200803031717.m23HH18K068262@repoman.freebsd.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Mon, Mar 03, 2008 at 05:17:01PM +0000 Rafal Jaworowski mentioned: > pci_ocp.c > Log: > Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family. > > The PQ3 is a high performance integrated communications processing system > based on the e500 core, which is an embedded RISC processor that implements > the 32-bit Book E definition of the PowerPC architecture. For details refer > to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E > Thank you all guys for this work! -- Stanislav Sedov ST4096-RIPE
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20080305234622.GC83691>