Date: Wed, 27 Dec 2017 18:22:02 +0000 (UTC) From: Kyle Evans <kevans@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r327240 - head/sys/arm/allwinner Message-ID: <201712271822.vBRIM2og034927@repo.freebsd.org>
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Author: kevans Date: Wed Dec 27 18:22:02 2017 New Revision: 327240 URL: https://svnweb.freebsd.org/changeset/base/327240 Log: if_awg: Respect rgmii-*id PHY configurations phy-mode can be one of: rgmii, rgmii-id, rgmii-txid, rgmii-rxid; as this was written, any of these alternate -id configurations would break as we fail to configure syscon for rgmii. Instead, simply check that phy-mode is configured for rgmii and we'll let the PHY driver handle any internal delay configuration. The pine64 should eventually specify phy-mode = "rgmii-txid" to address gigabit issues when rx delay is configured, motivating this change. Modified: head/sys/arm/allwinner/if_awg.c Modified: head/sys/arm/allwinner/if_awg.c ============================================================================== --- head/sys/arm/allwinner/if_awg.c Wed Dec 27 15:39:31 2017 (r327239) +++ head/sys/arm/allwinner/if_awg.c Wed Dec 27 18:22:02 2017 (r327240) @@ -1177,7 +1177,7 @@ awg_setup_phy(device_t dev) if (sc->res[_RES_SYSCON] != NULL) { reg = bus_read_4(sc->res[_RES_SYSCON], 0); reg &= ~(EMAC_CLK_PIT | EMAC_CLK_SRC | EMAC_CLK_RMII_EN); - if (strcmp(phy_type, "rgmii") == 0) + if (strncmp(phy_type, "rgmii", 5) == 0) reg |= EMAC_CLK_PIT_RGMII | EMAC_CLK_SRC_RGMII; else if (strcmp(phy_type, "rmii") == 0) reg |= EMAC_CLK_RMII_EN; @@ -1217,7 +1217,7 @@ awg_setup_phy(device_t dev) device_printf(dev, "EMAC clock: 0x%08x\n", reg); bus_write_4(sc->res[_RES_SYSCON], 0, reg); } else { - if (strcmp(phy_type, "rgmii") == 0) + if (strncmp(phy_type, "rgmii", 5) == 0) tx_parent_name = "emac_int_tx"; else tx_parent_name = "mii_phy_tx";
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