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Date:      Sun, 15 Jun 2008 07:55:01 GMT
From:      Julian Elischer <julian@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 143490 for review
Message-ID:  <200806150755.m5F7t15W064376@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=143490

Change 143490 by julian@julian_trafmon1 on 2008/06/15 07:54:28

	IFC@143481

Affected files ...

.. //depot/projects/vimage/src/sys/amd64/amd64/pmap.c#16 integrate
.. //depot/projects/vimage/src/sys/arm/xscale/i8134x/i81342_pci.c#3 integrate
.. //depot/projects/vimage/src/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c#2 integrate
.. //depot/projects/vimage/src/sys/conf/files#28 integrate
.. //depot/projects/vimage/src/sys/conf/files.i386#13 integrate
.. //depot/projects/vimage/src/sys/conf/files.pc98#10 integrate
.. //depot/projects/vimage/src/sys/conf/options.i386#6 integrate
.. //depot/projects/vimage/src/sys/conf/options.pc98#5 integrate
.. //depot/projects/vimage/src/sys/dev/bce/if_bce.c#15 integrate
.. //depot/projects/vimage/src/sys/dev/bce/if_bcefw.h#7 integrate
.. //depot/projects/vimage/src/sys/dev/bce/if_bcereg.h#10 integrate
.. //depot/projects/vimage/src/sys/dev/ex/if_ex.c#2 integrate
.. //depot/projects/vimage/src/sys/dev/ex/if_ex_isa.c#3 integrate
.. //depot/projects/vimage/src/sys/dev/ex/if_ex_pccard.c#3 integrate
.. //depot/projects/vimage/src/sys/dev/ex/if_exvar.h#3 integrate
.. //depot/projects/vimage/src/sys/dev/mii/brgphy.c#12 integrate
.. //depot/projects/vimage/src/sys/dev/smc/if_smc.c#4 integrate
.. //depot/projects/vimage/src/sys/dev/smc/if_smcvar.h#4 integrate
.. //depot/projects/vimage/src/sys/dev/usb/if_rum.c#11 integrate
.. //depot/projects/vimage/src/sys/dev/usb/usbdevs#22 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_apm.c#6 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_bsd.c#3 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_gpt.c#6 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_mbr.c#3 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_pc98.c#2 integrate
.. //depot/projects/vimage/src/sys/geom/part/g_part_vtoc8.c#2 integrate
.. //depot/projects/vimage/src/sys/i386/conf/NOTES#17 integrate
.. //depot/projects/vimage/src/sys/i386/include/pecoff_machdep.h#2 delete
.. //depot/projects/vimage/src/sys/kern/kern_conf.c#12 integrate
.. //depot/projects/vimage/src/sys/modules/Makefile#20 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp.h#13 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_asconf.c#18 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_auth.c#12 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_bsd_addr.c#14 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_bsd_addr.h#7 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_cc_functions.c#5 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_header.h#7 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_indata.c#25 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_input.c#25 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_lock_bsd.h#10 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_os_bsd.h#18 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_output.c#26 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_pcb.c#25 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_pcb.h#17 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_peeloff.c#13 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_sysctl.c#10 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_sysctl.h#8 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_timer.c#18 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_uio.h#15 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_usrreq.c#26 integrate
.. //depot/projects/vimage/src/sys/netinet/sctp_var.h#17 integrate
.. //depot/projects/vimage/src/sys/netinet/sctputil.c#27 integrate
.. //depot/projects/vimage/src/sys/netinet6/sctp6_usrreq.c#23 integrate
.. //depot/projects/vimage/src/sys/pc98/conf/NOTES#5 integrate
.. //depot/projects/vimage/src/sys/pc98/include/pecoff_machdep.h#2 delete
.. //depot/projects/vimage/src/sys/powerpc/powermac/grackle.c#4 integrate
.. //depot/projects/vimage/src/sys/powerpc/powermac/macio.c#4 integrate
.. //depot/projects/vimage/src/sys/powerpc/powermac/uninorth.c#5 integrate
.. //depot/projects/vimage/src/sys/security/mac/mac_framework.h#10 integrate
.. //depot/projects/vimage/src/sys/security/mac/mac_inet.c#9 integrate
.. //depot/projects/vimage/src/sys/security/mac/mac_policy.h#11 integrate
.. //depot/projects/vimage/src/sys/security/mac_biba/mac_biba.c#7 integrate
.. //depot/projects/vimage/src/sys/security/mac_lomac/mac_lomac.c#8 integrate
.. //depot/projects/vimage/src/sys/security/mac_mls/mac_mls.c#9 integrate
.. //depot/projects/vimage/src/sys/security/mac_stub/mac_stub.c#10 integrate
.. //depot/projects/vimage/src/sys/security/mac_test/mac_test.c#10 integrate
.. //depot/projects/vimage/src/sys/sys/apm.h#3 integrate
.. //depot/projects/vimage/src/sys/sys/conf.h#9 integrate
.. //depot/projects/vimage/src/sys/sys/ioctl.h#2 integrate
.. //depot/projects/vimage/src/sys/sys/ioctl_compat.h#3 integrate
.. //depot/projects/vimage/src/sys/sys/param.h#19 integrate
.. //depot/projects/vimage/src/sys/sys/systm.h#12 integrate
.. //depot/projects/vimage/src/sys/sys/ttychars.h#2 delete
.. //depot/projects/vimage/src/sys/sys/ttydev.h#2 delete
.. //depot/projects/vimage/src/sys/vm/vnode_pager.c#8 integrate

Differences ...

==== //depot/projects/vimage/src/sys/amd64/amd64/pmap.c#16 (text+ko) ====

@@ -77,7 +77,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/amd64/amd64/pmap.c,v 1.619 2008/06/01 07:36:59 alc Exp $");
+__FBSDID("$FreeBSD: src/sys/amd64/amd64/pmap.c,v 1.621 2008/06/13 19:33:56 alc Exp $");
 
 /*
  *	Manages physical address maps.
@@ -2759,8 +2759,8 @@
 
 /*
  * Tries to promote the 512, contiguous 4KB page mappings that are within a
- * single page table page to a single 2MB page mapping.  For promotion to
- * occur, two conditions must be met: (1) the 4KB page mappings must map
+ * single page table page (PTP) to a single 2MB page mapping.  For promotion
+ * to occur, two conditions must be met: (1) the 4KB page mappings must map
  * aligned, contiguous physical memory and (2) the 4KB page mappings must have
  * identical characteristics. 
  */
@@ -2768,31 +2768,46 @@
 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
 {
 	pd_entry_t newpde;
-	pt_entry_t *firstpte, oldpte, *pte;
+	pt_entry_t *firstpte, oldpte, pa, *pte;
 	vm_offset_t oldpteva;
-	vm_paddr_t pa;
 	vm_page_t mpte;
 
 	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
+
+	/*
+	 * Examine the first PTE in the specified PTP.  Abort if this PTE is
+	 * either invalid, unused, or does not map the first 4KB physical page
+	 * within a 2MB page. 
+	 */
 	firstpte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
+setpde:
 	newpde = *firstpte;
-	if ((newpde & (PG_A | PG_V)) != (PG_A | PG_V)) {
+	if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
 		pmap_pde_p_failures++;
 		CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 		    " in pmap %p", va, pmap);
 		return;
 	}
-	if ((newpde & (PG_M | PG_RW)) == PG_RW)
+	if ((newpde & (PG_M | PG_RW)) == PG_RW) {
+		/*
+		 * When PG_M is already clear, PG_RW can be cleared without
+		 * a TLB invalidation.
+		 */
+		if (!atomic_cmpset_long(firstpte, newpde, newpde & ~PG_RW))
+			goto setpde;
 		newpde &= ~PG_RW;
+	}
 
-	/* 
-	 * Check all the ptes before promotion
+	/*
+	 * Examine each of the other PTEs in the specified PTP.  Abort if this
+	 * PTE maps an unexpected 4KB physical page or does not have identical
+	 * characteristics to the first PTE.
 	 */
-	pa = newpde & PG_PS_FRAME;
-	for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
-retry:
+	pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
+	for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
+setpte:
 		oldpte = *pte;
-		if ((oldpte & PG_FRAME) != pa) {
+		if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
 			pmap_pde_p_failures++;
 			CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 			    " in pmap %p", va, pmap);
@@ -2804,7 +2819,7 @@
 			 * without a TLB invalidation.
 			 */
 			if (!atomic_cmpset_long(pte, oldpte, oldpte & ~PG_RW))
-				goto retry;
+				goto setpte;
 			oldpte &= ~PG_RW;
 			oldpteva = (oldpte & PG_FRAME & PDRMASK) |
 			    (va & ~PDRMASK);
@@ -2817,7 +2832,7 @@
 			    " in pmap %p", va, pmap);
 			return;
 		}
-		pa += PAGE_SIZE;
+		pa -= PAGE_SIZE;
 	}
 
 	/*

==== //depot/projects/vimage/src/sys/arm/xscale/i8134x/i81342_pci.c#3 (text+ko) ====

@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i8134x/i81342_pci.c,v 1.2 2007/09/30 11:05:14 marius Exp $");
+__FBSDID("$FreeBSD: src/sys/arm/xscale/i8134x/i81342_pci.c,v 1.3 2008/06/12 01:46:06 kevlo Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -185,7 +185,7 @@
 		IOP34X_PCIE_OIOBAR_VADDR,
 		(sc->sc_is_atux ? IOP34X_PCIX_OIOBAR_VADDR :
 		IOP34X_PCIE_OIOBAR_VADDR) + IOP34X_OIOBAR_SIZE) != 0) {
-		panic("i80321_pci_probe: failed to set up I/O rman");
+		panic("i81342_pci_probe: failed to set up I/O rman");
 	}
 	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
 	sc->sc_mem_rman.rm_descr = "I81342 PCI Memory";

==== //depot/projects/vimage/src/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c#2 (text+ko) ====

@@ -279,12 +279,6 @@
 #ifndef	MAXMIN64
 #define	MAXMIN64	0xffffffffUL
 #endif
-#ifndef major
-#define	major(x)	((int)(((u_int)(x) >> 8)&0xff))	/* major number */
-#endif
-#ifndef minor
-#define	minor(x)	((int)((x)&0xffff00ff))		/* minor number */
-#endif
 
 /*
  * Create special expldev for ZFS private use.
@@ -297,7 +291,7 @@
 static uint64_t
 zfs_expldev(dev_t dev)
 {
-	return (((uint64_t)major(dev) << NBITSMINOR64) | minor(dev));
+	return (((uint64_t)umajor(dev) << NBITSMINOR64) | uminor(dev));
 }
 /*
  * Special cmpldev for ZFS private use.

==== //depot/projects/vimage/src/sys/conf/files#28 (text+ko) ====

@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/files,v 1.1308 2008/06/11 22:10:10 jfv Exp $
+# $FreeBSD: src/sys/conf/files,v 1.1309 2008/06/14 15:17:02 rwatson Exp $
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
@@ -1818,7 +1818,7 @@
 netatalk/aarp.c			optional netatalk
 netatalk/at_control.c		optional netatalk
 netatalk/at_proto.c		optional netatalk
-netatalk/at_rmx.c		optional netatalkdebug
+netatalk/at_rmx.c		optional netatalk
 netatalk/ddp_input.c		optional netatalk
 netatalk/ddp_output.c		optional netatalk
 netatalk/ddp_pcb.c		optional netatalk

==== //depot/projects/vimage/src/sys/conf/files.i386#13 (text+ko) ====

@@ -1,7 +1,7 @@
 # This file tells config what files go into building a kernel,
 # files marked standard are always included.
 #
-# $FreeBSD: src/sys/conf/files.i386,v 1.596 2008/05/26 10:39:52 bz Exp $
+# $FreeBSD: src/sys/conf/files.i386,v 1.597 2008/06/14 12:51:44 wkoszek Exp $
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
@@ -107,7 +107,6 @@
 compat/ndis/subr_pe.c		optional ndisapi pci
 compat/ndis/subr_usbd.c		optional ndisapi pci
 compat/ndis/winx32_wrap.S	optional ndisapi pci
-compat/pecoff/imgact_pecoff.c	optional pecoff_support
 compat/svr4/imgact_svr4.c	optional compat_svr4
 compat/svr4/svr4_fcntl.c	optional compat_svr4
 compat/svr4/svr4_filio.c	optional compat_svr4

==== //depot/projects/vimage/src/sys/conf/files.pc98#10 (text+ko) ====

@@ -3,7 +3,7 @@
 #
 # modified for PC-9801/PC-9821
 #
-# $FreeBSD: src/sys/conf/files.pc98,v 1.363 2008/05/26 10:39:52 bz Exp $
+# $FreeBSD: src/sys/conf/files.pc98,v 1.364 2008/06/14 12:51:44 wkoszek Exp $
 #
 # The long compile-with and dependency lines are required because of
 # limitations in config: backslash-newline doesn't work in strings, and
@@ -70,7 +70,6 @@
 compat/linux/linux_time.c	optional compat_linux
 compat/linux/linux_uid16.c	optional compat_linux
 compat/linux/linux_util.c	optional compat_linux
-compat/pecoff/imgact_pecoff.c	optional pecoff_support
 compat/svr4/imgact_svr4.c	optional compat_svr4
 compat/svr4/svr4_fcntl.c	optional compat_svr4
 compat/svr4/svr4_filio.c	optional compat_svr4

==== //depot/projects/vimage/src/sys/conf/options.i386#6 (text+ko) ====

@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/options.i386,v 1.241 2008/05/26 10:39:52 bz Exp $
+# $FreeBSD: src/sys/conf/options.i386,v 1.242 2008/06/14 12:51:44 wkoszek Exp $
 # Options specific to the i386 platform kernels
 
 AUTO_EOI_1		opt_auto_eoi.h
@@ -27,8 +27,6 @@
 LINPROCFS		opt_dontuse.h
 LINSYSFS		opt_dontuse.h
 NDISAPI			opt_dontuse.h
-PECOFF_DEBUG		opt_pecoff.h
-PECOFF_SUPPORT		opt_dontuse.h
 
 # Change KVM size.  Changes things all over the kernel.
 KVA_PAGES		opt_global.h

==== //depot/projects/vimage/src/sys/conf/options.pc98#5 (text+ko) ====

@@ -1,4 +1,4 @@
-# $FreeBSD: src/sys/conf/options.pc98,v 1.203 2008/05/26 10:39:52 bz Exp $
+# $FreeBSD: src/sys/conf/options.pc98,v 1.204 2008/06/14 12:51:44 wkoszek Exp $
 # Options specific to the pc98 platform kernels
 
 AUTO_EOI_1		opt_auto_eoi.h
@@ -25,8 +25,6 @@
 DEBUG_SVR4		opt_svr4.h
 LINPROCFS		opt_dontuse.h
 LINSYSFS		opt_dontuse.h
-PECOFF_DEBUG		opt_pecoff.h
-PECOFF_SUPPORT		opt_dontuse.h
 
 # Change KVM size.  Changes things all over the kernel.
 KVA_PAGES		opt_global.h

==== //depot/projects/vimage/src/sys/dev/bce/if_bce.c#15 (text) ====

@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.41 2008/06/10 02:19:11 davidch Exp $");
+__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.42 2008/06/13 01:16:37 davidch Exp $");
 
 /*
  * The following controllers are supported by this driver:
@@ -37,12 +37,16 @@
  *   BCM5706S A2, A3
  *   BCM5708C B1, B2
  *   BCM5708S B1, B2
+ *   BCM5709C A1, C0
+ *   BCM5716  C0
  *
  * The following controllers are not supported by this driver:
  *   BCM5706C A0, A1 (pre-production)
  *   BCM5706S A0, A1 (pre-production)
  *   BCM5708C A0, B0 (pre-production)
  *   BCM5708S A0, B0 (pre-production)
+ *   BCM5709C A0  B0, B1, B2 (pre-production)
+ *   BCM5709S A0, A1, B0, B1, B2, C0 (pre-production)
  */
 
 #include "opt_bce.h"
@@ -85,8 +89,9 @@
 /****************************************************************************/
 /* BCE Build Time Options                                                   */
 /****************************************************************************/
-#define BCE_USE_SPLIT_HEADER 1
+#define BCE_USE_SPLIT_HEADER 1
 /* #define BCE_NVRAM_WRITE_SUPPORT 1 */
+
 
 /****************************************************************************/
 /* PCI Device ID Table                                                      */
@@ -117,6 +122,19 @@
 	/* BCM5708S controllers and OEM boards. */
 	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5708S,  PCI_ANY_ID,  PCI_ANY_ID,
 		"Broadcom NetXtreme II BCM5708 1000Base-SX" },
+
+	/* BCM5709C controllers and OEM boards. */
+	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709,  PCI_ANY_ID,  PCI_ANY_ID,
+		"Broadcom NetXtreme II BCM5709 1000Base-T" },
+
+	/* BCM5709S controllers and OEM boards. */
+	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5709S,  PCI_ANY_ID,  PCI_ANY_ID,
+		"Broadcom NetXtreme II BCM5709 1000Base-SX" },
+
+	/* BCM5716 controllers and OEM boards. */
+	{ BRCM_VENDORID, BRCM_DEVICEID_BCM5716,  PCI_ANY_ID,  PCI_ANY_ID,
+		"Broadcom NetXtreme II BCM5716 1000Base-T" },
+
 	{ 0, 0, 0, 0, NULL }
 };
 
@@ -126,91 +144,110 @@
 /****************************************************************************/
 static struct flash_spec flash_table[] =
 {
+#define BUFFERED_FLAGS		(BCE_NV_BUFFERED | BCE_NV_TRANSLATE)
+#define NONBUFFERED_FLAGS	(BCE_NV_WREN)
+
 	/* Slow EEPROM */
 	{0x00000000, 0x40830380, 0x009f0081, 0xa184a053, 0xaf000400,
-	 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+	 BUFFERED_FLAGS, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
 	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
 	 "EEPROM - slow"},
 	/* Expansion entry 0001 */
 	{0x08000002, 0x4b808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 0001"},
 	/* Saifun SA25F010 (non-buffered flash) */
 	/* strap, cfg1, & write1 need updates */
 	{0x04000001, 0x47808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
 	 "Non-buffered flash (128kB)"},
 	/* Saifun SA25F020 (non-buffered flash) */
 	/* strap, cfg1, & write1 need updates */
 	{0x0c000003, 0x4f808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
 	 "Non-buffered flash (256kB)"},
 	/* Expansion entry 0100 */
 	{0x11000000, 0x53808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 0100"},
 	/* Entry 0101: ST M45PE10 (non-buffered flash, TetonII B0) */
 	{0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,
-	 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
 	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
 	 "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
 	/* Entry 0110: ST M45PE20 (non-buffered flash)*/
 	{0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
-	 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
 	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
 	 "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
 	/* Saifun SA25F005 (non-buffered flash) */
 	/* strap, cfg1, & write1 need updates */
 	{0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
 	 "Non-buffered flash (64kB)"},
 	/* Fast EEPROM */
 	{0x22000000, 0x62808380, 0x009f0081, 0xa184a053, 0xaf000400,
-	 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+	 BUFFERED_FLAGS, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
 	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
 	 "EEPROM - fast"},
 	/* Expansion entry 1001 */
 	{0x2a000002, 0x6b808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 1001"},
 	/* Expansion entry 1010 */
 	{0x26000001, 0x67808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 1010"},
 	/* ATMEL AT45DB011B (buffered flash) */
 	{0x2e000003, 0x6e808273, 0x00570081, 0x68848353, 0xaf000400,
-	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
 	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
 	 "Buffered flash (128kB)"},
 	/* Expansion entry 1100 */
 	{0x33000000, 0x73808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 1100"},
 	/* Expansion entry 1101 */
 	{0x3b000002, 0x7b808201, 0x00050081, 0x03840253, 0xaf020406,
-	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 NONBUFFERED_FLAGS, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
 	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 1101"},
 	/* Ateml Expansion entry 1110 */
 	{0x37000001, 0x76808273, 0x00570081, 0x68848353, 0xaf000400,
-	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
 	 BUFFERED_FLASH_BYTE_ADDR_MASK, 0,
 	 "Entry 1110 (Atmel)"},
 	/* ATMEL AT45DB021B (buffered flash) */
 	{0x3f000003, 0x7e808273, 0x00570081, 0x68848353, 0xaf000400,
-	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLAGS, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
 	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE*2,
 	 "Buffered flash (256kB)"},
 };
 
+/*
+ * The BCM5709 controllers transparently handle the
+ * differences between Atmel 264 byte pages and all
+ * flash devices which use 256 byte pages, so no
+ * logical-to-physical mapping is required in the
+ * driver.
+ */
+static struct flash_spec flash_5709 = {
+	.flags		= BCE_NV_BUFFERED,
+	.page_bits	= BCM5709_FLASH_PAGE_BITS,
+	.page_size	= BCM5709_FLASH_PAGE_SIZE,
+	.addr_mask	= BCM5709_FLASH_BYTE_ADDR_MASK,
+	.total_size	= BUFFERED_FLASH_TOTAL_SIZE * 2,
+	.name		= "5709 buffered flash (256kB)",
+};
+
 
 /****************************************************************************/
 /* FreeBSD device entry points.                                             */
@@ -225,31 +262,40 @@
 /* BCE Debug Data Structure Dump Routines                                   */
 /****************************************************************************/
 #ifdef BCE_DEBUG
+static u32	bce_reg_rd				(struct bce_softc *, u32);
+static void	bce_reg_wr				(struct bce_softc *, u32, u32);
+static void	bce_reg_wr16			(struct bce_softc *, u32, u16);
 static u32  bce_ctx_rd				(struct bce_softc *, u32, u32);
 static void bce_dump_mbuf 			(struct bce_softc *, struct mbuf *);
 static void bce_dump_tx_mbuf_chain	(struct bce_softc *, u16, int);
 static void bce_dump_rx_mbuf_chain	(struct bce_softc *, u16, int);
-#ifdef BCE_USE_SPLIT_HEADER
-static void bce_dump_pg_mbuf_chain	(struct bce_softc *, u16, int);
+#ifdef BCE_USE_SPLIT_HEADER
+static void bce_dump_pg_mbuf_chain	(struct bce_softc *, u16, int);
 #endif
 static void bce_dump_txbd			(struct bce_softc *, int, struct tx_bd *);
 static void bce_dump_rxbd			(struct bce_softc *, int, struct rx_bd *);
-#ifdef BCE_USE_SPLIT_HEADER
-static void bce_dump_pgbd			(struct bce_softc *, int, struct rx_bd *);
+#ifdef BCE_USE_SPLIT_HEADER
+static void bce_dump_pgbd			(struct bce_softc *, int, struct rx_bd *);
 #endif
 static void bce_dump_l2fhdr			(struct bce_softc *, int, struct l2_fhdr *);
 static void bce_dump_ctx			(struct bce_softc *, u16);
 static void bce_dump_ftqs			(struct bce_softc *);
 static void bce_dump_tx_chain		(struct bce_softc *, u16, int);
 static void bce_dump_rx_chain		(struct bce_softc *, u16, int);
-#ifdef BCE_USE_SPLIT_HEADER
-static void bce_dump_pg_chain		(struct bce_softc *, u16, int);
+#ifdef BCE_USE_SPLIT_HEADER
+static void bce_dump_pg_chain		(struct bce_softc *, u16, int);
 #endif
 static void bce_dump_status_block	(struct bce_softc *);
 static void bce_dump_stats_block	(struct bce_softc *);
 static void bce_dump_driver_state	(struct bce_softc *);
 static void bce_dump_hw_state		(struct bce_softc *);
+static void bce_dump_mq_regs        (struct bce_softc *);
 static void bce_dump_bc_state		(struct bce_softc *);
+static void bce_dump_txp_state		(struct bce_softc *, int);
+static void bce_dump_rxp_state		(struct bce_softc *, int);
+static void bce_dump_tpat_state		(struct bce_softc *, int);
+static void bce_dump_cp_state		(struct bce_softc *, int);
+static void bce_dump_com_state		(struct bce_softc *, int);
 static void bce_breakpoint			(struct bce_softc *);
 #endif
 
@@ -287,6 +333,7 @@
 /****************************************************************************/
 /*                                                                          */
 /****************************************************************************/
+static void bce_get_media			(struct bce_softc *);
 static void bce_dma_map_addr		(void *, bus_dma_segment_t *, int, int);
 static int  bce_dma_alloc			(device_t);
 static void bce_dma_free			(struct bce_softc *);
@@ -298,28 +345,33 @@
 static int  bce_fw_sync				(struct bce_softc *, u32);
 static void bce_load_rv2p_fw		(struct bce_softc *, u32 *, u32, u32);
 static void bce_load_cpu_fw			(struct bce_softc *, struct cpu_reg *, struct fw_info *);
+static void bce_init_rxp_cpu		(struct bce_softc *);
+static void bce_init_txp_cpu 		(struct bce_softc *);
+static void bce_init_tpat_cpu		(struct bce_softc *);
+static void bce_init_cp_cpu		  	(struct bce_softc *);
+static void bce_init_com_cpu	  	(struct bce_softc *);
 static void bce_init_cpus			(struct bce_softc *);
 
+static void	bce_print_adapter_info	(struct bce_softc *);
+static void bce_probe_pci_caps		(device_t, struct bce_softc *);
 static void bce_stop				(struct bce_softc *);
 static int  bce_reset				(struct bce_softc *, u32);
 static int  bce_chipinit 			(struct bce_softc *);
 static int  bce_blockinit 			(struct bce_softc *);
-static int  bce_get_rx_buf			(struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
-#ifdef BCE_USE_SPLIT_HEADER
-static int  bce_get_pg_buf			(struct bce_softc *, struct mbuf *, u16 *, u16 *);
-#endif
 
 static int  bce_init_tx_chain		(struct bce_softc *);
 static void bce_free_tx_chain		(struct bce_softc *);
 
+static int  bce_get_rx_buf			(struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
 static int  bce_init_rx_chain		(struct bce_softc *);
 static void bce_fill_rx_chain		(struct bce_softc *);
 static void bce_free_rx_chain		(struct bce_softc *);
-
+
 #ifdef BCE_USE_SPLIT_HEADER
+static int  bce_get_pg_buf			(struct bce_softc *, struct mbuf *, u16 *, u16 *);
 static int  bce_init_pg_chain		(struct bce_softc *);
 static void bce_fill_pg_chain		(struct bce_softc *);
-static void bce_free_pg_chain		(struct bce_softc *);
+static void bce_free_pg_chain		(struct bce_softc *);
 #endif
 
 static int  bce_tx_encap			(struct bce_softc *, struct mbuf **);
@@ -342,7 +394,8 @@
 static void bce_rx_intr				(struct bce_softc *);
 static void bce_tx_intr				(struct bce_softc *);
 static void bce_disable_intr		(struct bce_softc *);
-static void bce_enable_intr			(struct bce_softc *);
+static void bce_enable_intr			(struct bce_softc *, int);
+
 static void bce_intr				(void *);
 static void bce_set_rx_mode			(struct bce_softc *);
 static void bce_stats_update		(struct bce_softc *);
@@ -400,26 +453,27 @@
 /****************************************************************************/
 /* Tunable device values                                                    */
 /****************************************************************************/
-static int bce_tso_enable = TRUE;
-static int bce_msi_enable = 1;
-
 SYSCTL_NODE(_hw, OID_AUTO, bce, CTLFLAG_RD, 0, "bce driver parameters");
 
 /* Allowable values are TRUE or FALSE */
+static int bce_tso_enable = TRUE;
 TUNABLE_INT("hw.bce.tso_enable", &bce_tso_enable);
 SYSCTL_UINT(_hw_bce, OID_AUTO, tso_enable, CTLFLAG_RDTUN, &bce_tso_enable, 0,
 "TSO Enable/Disable");
 
-/* Allowable values are 0 (IRQ only) and 1 (IRQ or MSI) */
+/* Allowable values are 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */
+/* ToDo: Add MSI-X support. */
+static int bce_msi_enable = 1;
 TUNABLE_INT("hw.bce.msi_enable", &bce_msi_enable);
 SYSCTL_UINT(_hw_bce, OID_AUTO, msi_enable, CTLFLAG_RDTUN, &bce_msi_enable, 0,
-"MSI | INTx selector");
+"MSI-X|MSI|INTx selector");
 
 /* ToDo: Add tunable to enable/disable strict MTU handling. */
 /* Currently allows "loose" RX MTU checking (i.e. sets the  */
 /* h/w RX MTU to the size of the largest receive buffer, or */
 /* 2048 bytes).                                             */
 
+
 /****************************************************************************/
 /* Device probe function.                                                   */
 /*                                                                          */
@@ -450,14 +504,14 @@
 	svid = pci_get_subvendor(dev);
 	sdid = pci_get_subdevice(dev);
 
-	DBPRINT(sc, BCE_VERBOSE_LOAD, 
+	DBPRINT(sc, BCE_EXTREME_LOAD,
 		"%s(); VID = 0x%04X, DID = 0x%04X, SVID = 0x%04X, "
 		"SDID = 0x%04X\n", __FUNCTION__, vid, did, svid, sdid);
 
 	/* Look through the list of known devices for a match. */
 	while(t->bce_name != NULL) {
 
-		if ((vid == t->bce_vid) && (did == t->bce_did) && 
+		if ((vid == t->bce_vid) && (did == t->bce_did) &&
 			((svid == t->bce_svid) || (t->bce_svid == PCI_ANY_ID)) &&
 			((sdid == t->bce_sdid) || (t->bce_sdid == PCI_ANY_ID))) {
 
@@ -467,7 +521,7 @@
 				return(ENOMEM);
 
 			/* Print out the device identity. */
-			snprintf(descbuf, BCE_DEVDESC_MAX, "%s (%c%d)", 
+			snprintf(descbuf, BCE_DEVDESC_MAX, "%s (%c%d)",
 				t->bce_name,
 			    (((pci_read_config(dev, PCIR_REVID, 4) & 0xf0) >> 4) + 'A'),
 			    (pci_read_config(dev, PCIR_REVID, 4) & 0xf));
@@ -484,6 +538,109 @@
 
 
 /****************************************************************************/
+/* PCI Capabilities Probe Function.                                         */
+/*                                                                          */
+/* Walks the PCI capabiites list for the device to find what features are   */
+/* supported.                                                               */
+/*                                                                          */
+/* Returns:                                                                 */
+/*   None.                                                                  */
+/****************************************************************************/
+static void
+bce_print_adapter_info(struct bce_softc *sc)
+{
+	DBENTER(BCE_VERBOSE_LOAD);
+
+	BCE_PRINTF("ASIC (0x%08X); ", sc->bce_chipid);
+	printf("Rev (%c%d); ", ((BCE_CHIP_ID(sc) & 0xf000) >> 12) + 'A',
+		((BCE_CHIP_ID(sc) & 0x0ff0) >> 4));
+
+	/* Bus info. */
+	if (sc->bce_flags & BCE_PCIE_FLAG) {
+		printf("Bus (PCIe x%d, ", sc->link_width);
+		switch (sc->link_speed) {
+			case 1: printf("2.5Gbps); "); break;
+			case 2:	printf("5Gbps); "); break;
+			default: printf("Unknown link speed); ");
+		}
+	} else {
+		printf("Bus (PCI%s, %s, %dMHz); ",
+			((sc->bce_flags & BCE_PCIX_FLAG) ? "-X" : ""),
+			((sc->bce_flags & BCE_PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
+			sc->bus_speed_mhz);
+	}
+
+	/* Firmware version and device features. */
+	printf("F/W (0x%08X); Flags( ", sc->bce_fw_ver);
+#ifdef BCE_USE_SPLIT_HEADER
+	printf("SPLT ");
+#endif
+	if (sc->bce_flags & BCE_MFW_ENABLE_FLAG)
+		printf("MFW ");
+	if (sc->bce_flags & BCE_USING_MSI_FLAG)
+		printf("MSI ");
+	if (sc->bce_flags & BCE_USING_MSIX_FLAG)
+		printf("MSI-X ");
+	if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)
+		printf("2.5G ");
+	printf(")\n");
+
+	DBEXIT(BCE_VERBOSE_LOAD);
+}
+
+
+/****************************************************************************/
+/* PCI Capabilities Probe Function.                                         */
+/*                                                                          */
+/* Walks the PCI capabiites list for the device to find what features are   */
+/* supported.                                                               */
+/*                                                                          */
+/* Returns:                                                                 */
+/*   None.                                                                  */
+/****************************************************************************/
+static void
+bce_probe_pci_caps(device_t dev, struct bce_softc *sc)
+{
+	u32 reg;
+
+	DBENTER(BCE_VERBOSE_LOAD);
+
+	/* Check if PCI-X capability is enabled. */
+	if (pci_find_extcap(dev, PCIY_PCIX, &reg) == 0) {
+		if (reg != 0)
+			sc->bce_cap_flags |= BCE_PCIX_CAPABLE_FLAG;
+	}
+
+	/* Check if PCIe capability is enabled. */
+	if (pci_find_extcap(dev, PCIY_EXPRESS, &reg) == 0) {
+		if (reg != 0) {
+			u16 link_status = pci_read_config(dev, reg + 0x12, 2);
+			DBPRINT(sc, BCE_INFO_LOAD, "PCIe link_status = 0x%08X\n",
+				link_status);
+			sc->link_speed = link_status & 0xf;
+			sc->link_width = (link_status >> 4) & 0x3f;
+			sc->bce_cap_flags |= BCE_PCIE_CAPABLE_FLAG;
+			sc->bce_flags |= BCE_PCIE_FLAG;
+		}
+	}
+
+	/* Check if MSI capability is enabled. */
+	if (pci_find_extcap(dev, PCIY_MSI, &reg) == 0) {
+		if (reg != 0)
+			sc->bce_cap_flags |= BCE_MSI_CAPABLE_FLAG;
+	}
+
+	/* Check if MSI-X capability is enabled. */
+	if (pci_find_extcap(dev, PCIY_MSIX, &reg) == 0) {
+		if (reg != 0)
+			sc->bce_cap_flags |= BCE_MSIX_CAPABLE_FLAG;
+	}
+
+	DBEXIT(BCE_VERBOSE_LOAD);
+}
+
+
+/****************************************************************************/
 /* Device attach function.                                                  */
 /*                                                                          */
 /* Allocates device resources, performs secondary chip identification,      */
@@ -499,12 +656,12 @@
 	struct bce_softc *sc;
 	struct ifnet *ifp;
 	u32 val;
-	int count, rid, rc = 0;
+	int error, rid, rc = 0;
 
 	sc = device_get_softc(dev);
 	sc->bce_dev = dev;
 
-	DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+	DBENTER(BCE_VERBOSE_LOAD | BCE_VERBOSE_RESET);
 
 	sc->bce_unit = device_get_unit(dev);
 
@@ -520,7 +677,7 @@
 		&rid, RF_ACTIVE);
 
 	if (sc->bce_res_mem == NULL) {
-		BCE_PRINTF("%s(%d): PCI memory allocation failed\n", 
+		BCE_PRINTF("%s(%d): PCI memory allocation failed\n",
 			__FILE__, __LINE__);
 		rc = ENXIO;
 		goto bce_attach_fail;
@@ -531,25 +688,73 @@
 	sc->bce_bhandle = rman_get_bushandle(sc->bce_res_mem);
 	sc->bce_vhandle = (vm_offset_t) rman_get_virtual(sc->bce_res_mem);
 
-	/* If MSI is enabled in the driver, get the vector count. */
-	count = bce_msi_enable ? pci_msi_count(dev) : 0;
+	bce_probe_pci_caps(dev, sc);
+
+	rid = 1;
+#if 0
+	/* Try allocating MSI-X interrupts. */
+	if ((sc->bce_cap_flags & BCE_MSIX_CAPABLE_FLAG) &&
+		(bce_msi_enable >= 2) &&
+		((sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
+		&rid, RF_ACTIVE)) != NULL)) {
+
+		msi_needed = sc->bce_msi_count = 1;
+
+		if (((error = pci_alloc_msix(dev, &sc->bce_msi_count)) != 0) ||
+			(sc->bce_msi_count != msi_needed)) {
+			BCE_PRINTF("%s(%d): MSI-X allocation failed! Requested = %d,"
+				"Received = %d, error = %d\n", __FILE__, __LINE__,
+				msi_needed, sc->bce_msi_count, error);
+			sc->bce_msi_count = 0;
+			pci_release_msi(dev);
+			bus_release_resource(dev, SYS_RES_MEMORY, rid,
+				sc->bce_res_irq);
+			sc->bce_res_irq = NULL;
+		} else {
+			DBPRINT(sc, BCE_INFO_LOAD, "%s(): Using MSI-X interrupt.\n",
+				__FUNCTION__);
+			sc->bce_flags |= BCE_USING_MSIX_FLAG;
+			sc->bce_intr = bce_intr;
+		}
+	}
+#endif
+
+	/* Try allocating a MSI interrupt. */
+	if ((sc->bce_cap_flags & BCE_MSI_CAPABLE_FLAG) &&
+		(bce_msi_enable >= 1) && (sc->bce_msi_count == 0)) {
+		sc->bce_msi_count = 1;
+		if ((error = pci_alloc_msi(dev, &sc->bce_msi_count)) != 0) {
+			BCE_PRINTF("%s(%d): MSI allocation failed! error = %d\n",
+				__FILE__, __LINE__, error);
+			sc->bce_msi_count = 0;
+			pci_release_msi(dev);
+		} else {
+			DBPRINT(sc, BCE_INFO_LOAD, "%s(): Using MSI interrupt.\n",
+				__FUNCTION__);
+			sc->bce_flags |= BCE_USING_MSI_FLAG;
+			if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709)
+				sc->bce_flags |= BCE_ONE_SHOT_MSI_FLAG;
+			sc->bce_irq_rid = 1;
+			sc->bce_intr = bce_intr;
+		}
+	}
 
-	/* Allocate PCI IRQ resources. */
-	if (count == 1 && pci_alloc_msi(dev, &count) == 0 && count == 1) {
-		rid = 1;
-		sc->bce_flags |= BCE_USING_MSI_FLAG;
-		DBPRINT(sc, BCE_VERBOSE_LOAD, 
-			"Allocating %d MSI interrupt(s)\n", count);
-	} else {
+	/* Try allocating a legacy interrupt. */
+	if (sc->bce_msi_count == 0) {
+		DBPRINT(sc, BCE_INFO_LOAD, "%s(): Using INTx interrupt.\n",
+			__FUNCTION__);
 		rid = 0;
-		DBPRINT(sc, BCE_VERBOSE_LOAD, "Allocating IRQ interrupt\n");
+		sc->bce_intr = bce_intr;
 	}
 
-	sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
-	    RF_SHAREABLE | RF_ACTIVE);
+	sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
+		&rid, RF_SHAREABLE | RF_ACTIVE);
+
+	sc->bce_irq_rid = rid;
 
+	/* Report any IRQ allocation errors. */
 	if (sc->bce_res_irq == NULL) {
-		BCE_PRINTF("%s(%d): PCI map interrupt failed!\n", 
+		BCE_PRINTF("%s(%d): PCI map interrupt failed!\n",
 			__FILE__, __LINE__);
 		rc = ENXIO;
 		goto bce_attach_fail;
@@ -577,18 +782,22 @@
 		case BCE_CHIP_ID_5706_A1:
 		case BCE_CHIP_ID_5708_A0:
 		case BCE_CHIP_ID_5708_B0:
+		case BCE_CHIP_ID_5709_A0:
+		case BCE_CHIP_ID_5709_B0:
+		case BCE_CHIP_ID_5709_B1:
+		case BCE_CHIP_ID_5709_B2:
 			BCE_PRINTF("%s(%d): Unsupported controller revision (%c%d)!\n",
-				__FILE__, __LINE__, 
+				__FILE__, __LINE__,
 				(((pci_read_config(dev, PCIR_REVID, 4) & 0xf0) >> 4) + 'A'),
 			    (pci_read_config(dev, PCIR_REVID, 4) & 0xf));
 			rc = ENODEV;
 			goto bce_attach_fail;
 	}
 
-	/* 
-	 * The embedded PCIe to PCI-X bridge (EPB) 
-	 * in the 5708 cannot address memory above 
-	 * 40 bits (E7_5708CB1_23043 & E6_5708SB1_23043). 
+	/*
+	 * The embedded PCIe to PCI-X bridge (EPB)
+	 * in the 5708 cannot address memory above
+	 * 40 bits (E7_5708CB1_23043 & E6_5708SB1_23043).
 	 */
 	if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5708)
 		sc->max_bus_addr = BCE_BUS_SPACE_MAXADDR;
@@ -602,15 +811,17 @@
 	 */
 	val = REG_RD_IND(sc, BCE_SHM_HDR_SIGNATURE);
 	if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) == BCE_SHM_HDR_SIGNATURE_SIG)
-		sc->bce_shmem_base = REG_RD_IND(sc, BCE_SHM_HDR_ADDR_0);
+		/* Multi-port devices use different offsets in shared memory. */
+		sc->bce_shmem_base = REG_RD_IND(sc, BCE_SHM_HDR_ADDR_0 +
+			(pci_get_function(sc->bce_dev) << 2));
 	else
 		sc->bce_shmem_base = HOST_VIEW_SHMEM_BASE;
 
-	DBPRINT(sc, BCE_VERBOSE_FIRMWARE, "%s(): bce_shmem_base = 0x%08X\n", 
+	DBPRINT(sc, BCE_VERBOSE_FIRMWARE, "%s(): bce_shmem_base = 0x%08X\n",
 		__FUNCTION__, sc->bce_shmem_base);
 
 	/* Fetch the bootcode revision. */
-	sc->bce_fw_ver = REG_RD_IND(sc, sc->bce_shmem_base + 
+	sc->bce_fw_ver = REG_RD_IND(sc, sc->bce_shmem_base +
 		BCE_DEV_INFO_BC_REV);
 
 	/* Check if any management firmware is running. */
@@ -665,7 +876,7 @@
 
 	/* Reset the controller and announce to bootcode that driver is present. */
 	if (bce_reset(sc, BCE_DRV_MSG_CODE_RESET)) {
-		BCE_PRINTF("%s(%d): Controller reset failed!\n", 
+		BCE_PRINTF("%s(%d): Controller reset failed!\n",
 			__FILE__, __LINE__);
 		rc = ENXIO;
 		goto bce_attach_fail;
@@ -695,7 +906,7 @@
 	 * should be ready before generating an
 	 * interrupt while ticks control how long
 	 * a BD can sit in the chain before
-	 * generating an interrupt.  Set the default 
+	 * generating an interrupt.  Set the default
 	 * values for the RX and TX chains.
 	 */
 
@@ -726,33 +937,14 @@
 	/* Update statistics once every second. */
 	sc->bce_stats_ticks = 1000000 & 0xffff00;
 
-	/*
-	 * The SerDes based NetXtreme II controllers
-	 * that support 2.5Gb operation (currently 
-	 * 5708S) use a PHY at address 2, otherwise 
-	 * the PHY is present at address 1.
-	 */
-	sc->bce_phy_addr = 1;
+	/* Find the media type for the adapter. */
+	bce_get_media(sc);
 
-	if (BCE_CHIP_BOND_ID(sc) & BCE_CHIP_BOND_ID_SERDES_BIT) {
-		sc->bce_phy_flags |= BCE_PHY_SERDES_FLAG;
-		sc->bce_flags |= BCE_NO_WOL_FLAG;
-		if (BCE_CHIP_NUM(sc) != BCE_CHIP_NUM_5706) {
-			sc->bce_phy_addr = 2;
-			val = REG_RD_IND(sc, sc->bce_shmem_base +
-					 BCE_SHARED_HW_CFG_CONFIG);
-			if (val & BCE_SHARED_HW_CFG_PHY_2_5G) {
-				sc->bce_phy_flags |= BCE_PHY_2_5G_CAPABLE_FLAG;
-				DBPRINT(sc, BCE_INFO_LOAD, "Found 2.5Gb capable adapter\n");
-			}
-		}
-	}
-
 	/* Store data needed by PHY driver for backplane applications */
 	sc->bce_shared_hw_cfg = REG_RD_IND(sc, sc->bce_shmem_base +
 		BCE_SHARED_HW_CFG_CONFIG);
 	sc->bce_port_hw_cfg   = REG_RD_IND(sc, sc->bce_shmem_base +
-		BCE_SHARED_HW_CFG_CONFIG);
+		BCE_PORT_HW_CFG_CONFIG);
 
 	/* Allocate DMA memory resources. */
 	if (bce_dma_alloc(dev)) {
@@ -765,7 +957,7 @@
 	/* Allocate an ifnet structure. */
 	ifp = sc->bce_ifp = if_alloc(IFT_ETHER);

>>> TRUNCATED FOR MAIL (1000 lines) <<<



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