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Date:      Sat, 18 Apr 1998 20:27:38 -0400 (EDT)
From:      Rick Lotoczky <rickl@ic.net>
To:        Tor Egge <Tor.Egge@idi.ntnu.no>
Cc:        smp@FreeBSD.ORG
Subject:   Re: SMP Problems
Message-ID:  <XFMail.980418202738.rickl@ic.net>
In-Reply-To: <199804182317.BAA04014@pat.idi.ntnu.no>

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On 18-Apr-98 Tor Egge wrote:
 
> Revision 1.28 of mpapic.c ignores the polarity and trigger mode on
> interrupts on the ISA bus.
> 
> Revision 1.29 of mpapic.c uses the information supplied in the MP
> table since some broken bioses registers PCI interrupts as ISA
> interrupts (but with `level' trigger mode and `active-low' polarity)
> and the IOAPIC should be programmed accordingly.
> 
> While working fine for one kind of MP table breakage, it might to have
> had unintended side effects for your kind of MP table breakage (where
> many ISA interrupts are registered with `level' trigger mode).
> 

Thanks Torr, that patch did the trick...all is well again and SMP is working
as it did. It's great to have that second processor back.


Rick

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