Date: Wed, 5 Jan 2011 13:26:26 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r217004 - in stable/8/share: examples/etc mk Message-ID: <201101051326.p05DQQK6079444@svn.freebsd.org>
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Author: marius Date: Wed Jan 5 13:26:26 2011 New Revision: 217004 URL: http://svn.freebsd.org/changeset/base/217004 Log: MFC: r216820 - Add CPUTYPE support for sparc64. The net result is that it's now possible to let the compiler optimize for the famility of UltraSPARC-III CPUs as the default already was to optimize for UltraSPARC-I/II and generating generic 64-bit V9 is mainly for reference purposes. At least for SPARC64-V CPUs code optimized for UltraSPARC-I/II still is the most performant one. Thanks go to Michael Moll for testing SPARC64-V. - Move a booke MACHINE_CPU bit into the right section. Modified: stable/8/share/examples/etc/make.conf stable/8/share/mk/bsd.cpu.mk Directory Properties: stable/8/share/examples/ (props changed) stable/8/share/examples/etc/ (props changed) stable/8/share/examples/kld/syscall/ (props changed) stable/8/share/mk/ (props changed) Modified: stable/8/share/examples/etc/make.conf ============================================================================== --- stable/8/share/examples/etc/make.conf Wed Jan 5 12:47:42 2011 (r217003) +++ stable/8/share/examples/etc/make.conf Wed Jan 5 13:26:26 2011 (r217004) @@ -39,6 +39,8 @@ # Alpha/AXP architecture: ev67 ev6 pca56 ev56 ev5 ev45 ev4 # AMD64 architecture: opteron, athlon64, nocona, prescott, core2 # Intel ia64 architecture: itanium2, itanium +# SPARC-V9 architecture: v9 (generic 64-bit V9), ultrasparc (default +# if omitted), ultrasparc3 # # (?= allows to buildworld for a different CPUTYPE.) # Modified: stable/8/share/mk/bsd.cpu.mk ============================================================================== --- stable/8/share/mk/bsd.cpu.mk Wed Jan 5 12:47:42 2011 (r217003) +++ stable/8/share/mk/bsd.cpu.mk Wed Jan 5 13:26:26 2011 (r217004) @@ -15,6 +15,7 @@ MACHINE_CPU = itanium . elif ${MACHINE_ARCH} == "powerpc" MACHINE_CPU = aim . elif ${MACHINE_ARCH} == "sparc64" +MACHINE_CPU = ultrasparc . elif ${MACHINE_ARCH} == "arm" MACHINE_CPU = arm . elif ${MACHINE_ARCH} == "mips" @@ -58,6 +59,12 @@ CPUTYPE = athlon . if ${CPUTYPE} == "prescott" || ${CPUTYPE} == "core2" CPUTYPE = nocona . endif +. elif ${MACHINE_ARCH} == "sparc64" +. if ${CPUTYPE} == "us" +CPUTYPE = ultrasparc +. elif ${CPUTYPE} == "us3" +CPUTYPE = ultrasparc3 +. endif . endif ############################################################################### @@ -116,7 +123,6 @@ _CPUCFLAGS = -mcpu=${CPUTYPE} . endif . elif ${MACHINE_ARCH} == "powerpc" . if ${CPUTYPE} == "e500" -MACHINE_CPU = booke _CPUCFLAGS = -Wa,-me500 -msoft-float . else _CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64 @@ -135,6 +141,14 @@ _CPUCFLAGS = -march=4kc . elif ${CPUTYPE} == "mips24kc" _CPUCFLAGS = -march=24kc . endif +. elif ${MACHINE_ARCH} == "sparc64" +. if ${CPUTYPE} == "v9" +_CPUCFLAGS = -mcpu=v9 +. elif ${CPUTYPE} == "ultrasparc" +_CPUCFLAGS = -mcpu=ultrasparc +. elif ${CPUTYPE} == "ultrasparc3" +_CPUCFLAGS = -mcpu=ultrasparc3 +. endif . endif # Set up the list of CPU features based on the CPU type. This is an @@ -191,6 +205,18 @@ MACHINE_CPU += amd64 sse2 sse mmx . if ${CPUTYPE} == "itanium" MACHINE_CPU = itanium . endif +. elif ${MACHINE_ARCH} == "powerpc" +. if ${CPUTYPE} == "e500" +MACHINE_CPU = booke +. endif +. elif ${MACHINE_ARCH} == "sparc64" +. if ${CPUTYPE} == "v9" +MACHINE_CPU = v9 +. elif ${CPUTYPE} == "ultrasparc" +MACHINE_CPU = v9 ultrasparc +. elif ${CPUTYPE} == "ultrasparc3" +MACHINE_CPU = v9 ultrasparc ultrasparc3 +. endif . endif .endif @@ -200,7 +226,7 @@ LDFLAGS += -mbig-endian LD += -EB .endif -.if ${MACHINE_ARCH} == "mips" +.if ${MACHINE_ARCH} == "mips" . if defined(TARGET_BIG_ENDIAN) CFLAGS += -EB LDFLAGS += -Wl,-EB
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