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Date:      Tue, 22 Aug 1995 12:37:41 +0200 (MET DST)
From:      Luigi Rizzo <luigi@labinfo.iet.unipi.it>
To:        freebsd-hackers@freebsd.org
Subject:   Re: How to abort a DMA transfer ?
Message-ID:  <199508221037.MAA15224@labinfo.iet.unipi.it>
In-Reply-To: <199508201813.UAA01188@uriah.heep.sax.de> from "J Wunsch" at Aug 20, 95 08:12:57 pm

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> Actually, i'd immediately kill the floppy controller if i would abort
> a transfer in progress.  The only means then would raise the reset
> line of the FDC.

It seems to me that it is the FDC controller the one who suffers
from incomplete operations, not the DMA controller.

> I'm not sure if setting some masking bit in one of the DMAC registers
> will actually _abort_ a transfer.  Van Gilluwe does only speak about
> masking a request.  The culprit is that DMA operation is usually
> IO-controlled (via the TC signal) instead of being software-
> controlled.

Got a copy of "The Undocumented PC" (Van Gilluwe). The sample code on
pg.855 does the following:

  1) sets the mask bit for the channel; this disable servicing requests;
  2) clears the LSB ff
  3) writes into the mode register for the channel
  4) programs the addr, count, etc.
  5) clears the mask bit for the channel

Step 1) should stop new requests to the DMA from being serviced;
after step 4), any request will have go to the newly specified
addresses (there must be no storage inside the DMA controller to
hold the old address).

I have no idea what use of the TC signal is made by my scanner's
controller, but given that I do reset & reprogram it on close, the
above sequence looks like what I wanted.

	Thanks everybody for their comments.
	Luigi
====================================================================
Luigi Rizzo                     Dip. di Ingegneria dell'Informazione
email: luigi@iet.unipi.it       Universita' di Pisa
tel: +39-50-568533              via Diotisalvi 2, 56126 PISA (Italy)
fax: +39-50-568522              http://www.iet.unipi.it/~luigi/
====================================================================



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