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Date:      Fri, 9 Jan 2015 18:07:39 +0100
From:      =?UTF-8?Q?Micha=C5=82_Stanek?= <mst@semihalf.com>
To:        Konstantin Belousov <kostikbel@gmail.com>
Cc:        freebsd-current@freebsd.org, freebsd-embedded@freebsd.org
Subject:   Re: [PATCH] Add support for 64-bit AHCI BAR.
Message-ID:  <CAMiGqYhi=SU6hg-utRLUi=HauE5Q1qxdYifAxaGNdbVXReaS%2BA@mail.gmail.com>
In-Reply-To: <20150108203959.GR42409@kib.kiev.ua>
References:  <CAMiGqYhKn49LrdFGS4DeGSHDOuVO1Ab0mwubyqGXzxFLmNGoEQ@mail.gmail.com> <20150108203959.GR42409@kib.kiev.ua>

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2015-01-08 21:40 GMT+01:00 Konstantin Belousov <kostikbel@gmail.com>:

> > However, if
> > AHCI uses 64-bit base addresses, then this register consists of two
> dwords
> > starting at offset 0x20 - BAR4 and BAR5. This is the case on our arm64
> > target and possibly other platforms using 64-bit BARs for AHCI.
> Is it specified anywhere, or just a quirk of the specific implementation ?
> If it is a quirk, would it make sense to also check the vendor or device
> id before applying the logic ?
>
>
Yes, indeed it is a quirk as I just found out that our platform vendor
actually uses BAR(0) as AHCI ABAR, while BAR(4) is used for something else.
I found it implemented as a quirk in Linux AHCI code.
The BAR is still 64-bit but in a different position than AHCI spec stated.
I changed it as you suggested, the new patch is in the attachment. Please
take a look.

>
> > The following patch adds a check for the extended BAR in
> ahci_pci_attach()
> > and sets the 'rid' in bus_alloc_resource_any accordingly. It fixes the
> > allocation error on our platform.
> >
> > Please review and test this patch on other platforms. If there are no
> > issues then it will be committed in a week.
> >
>

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