Date: Thu, 3 Jan 2008 03:18:49 GMT From: Warner Losh <imp@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 132363 for review Message-ID: <200801030318.m033In6V031837@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=132363 Change 132363 by imp@imp_paco-paco on 2008/01/03 03:18:40 On the road to getting the mips pmap.c to compile: fix all the silly errors. Also, there's some #define missing, so bracket the affected code with ifdefs for this #define. Fix trivial printf format errors and allow KSEG2 and KSSEG to be used. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/include/cpuregs.h#3 edit .. //depot/projects/mips2-jnpr/src/sys/mips/include/pmap.h#4 edit .. //depot/projects/mips2-jnpr/src/sys/mips/mips/pmap.c#5 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/include/cpuregs.h#3 (text+ko) ==== @@ -83,6 +83,8 @@ #define MIPS_KSEG1_END 0xbfffffff #define MIPS_KSSEG_START 0xc0000000 #define MIPS_KSSEG_END 0xdfffffff +#define MIPS_KSEG2_START MIPS_KSSEG_START +#define MIPS_KSEG2_END MIPS_KSSEG_END #define MIPS_KSEG3_START 0xe0000000 #define MIPS_KSEG3_END 0xffffffff #define MIPS_MAX_MEM_ADDR 0xbe000000 ==== //depot/projects/mips2-jnpr/src/sys/mips/include/pmap.h#4 (text+ko) ==== @@ -199,7 +199,7 @@ struct fpage { vm_offset_t kva; - u_int hstate; + u_int state; }; struct sysmaps { ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/pmap.c#5 (text+ko) ==== @@ -336,9 +336,11 @@ pmap_init(void) { +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { pmap_init_fpage(); } +#endif /* * Initialize the address space (zone) for the pv entries. Set a @@ -352,10 +354,6 @@ uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max); } -void -pmap_init2() -{ -} /*************************************************** * Low level helper routines..... ***************************************************/ @@ -685,6 +683,7 @@ /* * Create the floating pages, aka FPAGES! */ +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL static void pmap_init_fpage() { @@ -804,6 +803,7 @@ * Should there be any flush operation at the end? */ } +#endif /* Revision 1.507 * @@ -908,8 +908,10 @@ req = VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO; +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) req |= VM_ALLOC_WIRED_TLB_PG_POOL; +#endif /* * allocate the page directory page */ @@ -952,9 +954,10 @@ ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); req = VM_ALLOC_WIRED| VM_ALLOC_ZERO| VM_ALLOC_NOOBJ; +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) req |= VM_ALLOC_WIRED_TLB_PG_POOL; - +#endif /* * Find or fabricate a new pagetable page */ @@ -1146,10 +1149,10 @@ * This index is bogus, but out of the way */ req = VM_ALLOC_SYSTEM | VM_ALLOC_WIRED | VM_ALLOC_NOOBJ; - +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) req |= VM_ALLOC_WIRED_TLB_PG_POOL; - +#endif nkpg = vm_page_alloc(NULL, nkpt, req); if (!nkpg) panic("pmap_growkernel: no memory to grow kernel"); @@ -1728,7 +1731,7 @@ if (origpte & PG_M) { KASSERT((origpte & PG_RW), ("pmap_enter: modified page not writable:" - " va: 0x%x, pte: 0x%x", va, origpte)); + " va: 0x%x, pte: 0x%lx", va, origpte)); if ((page_is_managed(opa)) && pmap_track_modified(va)) vm_page_dirty(om); @@ -1894,12 +1897,14 @@ if (i != 0) printf("%s: ERROR!!! More than one page of virtual address mapping not supported\n", - __funct__); + __func__); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { va = pmap_map_fpage(pa, &fpages_shared[PMAP_FPAGE_KENTER_TEMP], TRUE); } else +#endif va = MIPS_PHYS_TO_CACHED(pa); return((void *)va); @@ -1979,6 +1984,7 @@ vm_offset_t va; vm_paddr_t phys = VM_PAGE_TO_PHYS(m); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { struct fpage *fp1; struct sysmaps *sysmaps; @@ -1996,7 +2002,9 @@ /* * Should you do cache flush? */ - } else { + } else +#endif + { va = MIPS_PHYS_TO_CACHED(phys); bzero((caddr_t) va, PAGE_SIZE); } @@ -2015,6 +2023,7 @@ vm_offset_t va; vm_paddr_t phys = VM_PAGE_TO_PHYS(m); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { struct fpage *fp1; struct sysmaps *sysmaps; @@ -2030,7 +2039,9 @@ sched_unpin(); mtx_unlock(&sysmaps->lock); - } else { + } else +#endif + { va = MIPS_PHYS_TO_CACHED(phys); bzero((char *)(caddr_t)va + off, size); } @@ -2042,13 +2053,16 @@ vm_offset_t va; vm_paddr_t phys = VM_PAGE_TO_PHYS(m); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { sched_pin(); va = pmap_map_fpage(phys, &fpages_shared[PMAP_FPAGE3], FALSE); bzero((caddr_t) va, PAGE_SIZE); pmap_unmap_fpage(phys, &fpages_shared[PMAP_FPAGE3]); sched_unpin(); - } else { + } else +#endif + { va = MIPS_PHYS_TO_CACHED(phys); bzero((caddr_t) va, PAGE_SIZE); } @@ -2069,6 +2083,7 @@ vm_paddr_t phy_dst = VM_PAGE_TO_PHYS(dst); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL if (need_wired_tlb_page_pool) { struct fpage *fp1, *fp2; struct sysmaps *sysmaps; @@ -2093,7 +2108,9 @@ /* * Should you flush the cache? */ - } else { + } else +#endif + { va_src = MIPS_PHYS_TO_CACHED(phy_src); va_dst = MIPS_PHYS_TO_CACHED(phy_dst); bcopy((caddr_t) va_src, (caddr_t) va_dst, PAGE_SIZE); @@ -2177,7 +2194,7 @@ m = PHYS_TO_VM_PAGE(mips_tlbpfn_to_paddr(tpte)); KASSERT(m < &vm_page_array[vm_page_array_size], - ("pmap_remove_pages: bad tpte %x", tpte)); + ("pmap_remove_pages: bad tpte %lx", tpte)); pv->pv_pmap->pm_stats.resident_count--; @@ -2255,7 +2272,6 @@ { register pv_entry_t pv; register pt_entry_t *pte; - int s; if (m->flags & PG_FICTITIOUS) return; @@ -2818,9 +2834,11 @@ else if (va >= MIPS_UNCACHED_MEMORY_ADDR && va < MIPS_KSEG2_START) pa = MIPS_UNCACHED_TO_PHYS(va); +#ifdef VM_ALLOC_WIRED_TLB_PG_POOL else if (need_wired_tlb_page_pool && ((va >= VM_MIN_KERNEL_ADDRESS) && (va < (VM_MIN_KERNEL_ADDRESS + VM_KERNEL_ALLOC_OFFSET)))) pa = MIPS_CACHED_TO_PHYS(va); +#endif else if (va >= MIPS_KSEG2_START && va < VM_MAX_KERNEL_ADDRESS) { pt_entry_t *ptep;
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