Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 4 Apr 2022 11:06:01 GMT
From:      Andrew Turner <andrew@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 912492325ac7 - stable/13 - Fix the TCR_TG0 values
Message-ID:  <202204041106.234B61r9086517@gitrepo.freebsd.org>

next in thread | raw e-mail | index | archive | help
The branch stable/13 has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=912492325ac7fb5eb07e2b5b89733091ceea1206

commit 912492325ac7fb5eb07e2b5b89733091ceea1206
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2022-03-10 10:54:39 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2022-04-04 09:37:06 +0000

    Fix the TCR_TG0 values
    
    They are in a different order to the TCR_TG1 values but appear to have
    been copied incorrectly.
    
    While here use TCR_TG0_4K in locore.S to make it explicit the userspace
    page size is 4K.
    
    Sponsored by:   The FreeBSD Foundation
    
    (cherry picked from commit f62e099ed51bf15ebafa20a044e106480547a0ad)
---
 sys/arm64/arm64/locore.S   | 2 +-
 sys/arm64/include/armreg.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S
index 64067ac31c8f..37483c321f48 100644
--- a/sys/arm64/arm64/locore.S
+++ b/sys/arm64/arm64/locore.S
@@ -753,7 +753,7 @@ mair:
 		MAIR_ATTR(MAIR_NORMAL_WB, VM_MEMATTR_WRITE_BACK)    |	\
 		MAIR_ATTR(MAIR_NORMAL_WT, VM_MEMATTR_WRITE_THROUGH)
 tcr:
-	.quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TG1_4K | \
+	.quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_TG1_4K | TCR_TG0_4K | \
 	    TCR_CACHE_ATTRS | TCR_SMP_ATTRS)
 sctlr_set:
 	/* Bits to set */
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index bd024a0f4d0d..3a26c7bb5d40 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -1401,9 +1401,9 @@
 #define	TCR_T1SZ_SHIFT		16
 #define	TCR_T1SZ(x)		((x) << TCR_T1SZ_SHIFT)
 #define	TCR_TG0_SHIFT		14
-#define	TCR_TG0_16K		(1UL << TCR_TG0_SHIFT)
-#define	TCR_TG0_4K		(2UL << TCR_TG0_SHIFT)
-#define	TCR_TG0_64K		(3UL << TCR_TG0_SHIFT)
+#define	TCR_TG0_4K		(0UL << TCR_TG0_SHIFT)
+#define	TCR_TG0_64K		(1UL << TCR_TG0_SHIFT)
+#define	TCR_TG0_16K		(2UL << TCR_TG0_SHIFT)
 #define	TCR_SH0_SHIFT		12
 #define	TCR_SH0_IS		(3UL << TCR_SH0_SHIFT)
 #define	TCR_ORGN0_SHIFT		10



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?202204041106.234B61r9086517>