Date: Wed, 31 Mar 2010 21:57:49 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/sparc64/include tlb.h tte.h src/sys/sparc64/sparc64 genassym.c pmap.c swtch.S Message-ID: <201003312158.o2VLwL8t027674@repoman.freebsd.org>
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marius 2010-03-31 21:57:49 UTC
FreeBSD src repository
Modified files: (Branch: RELENG_7)
sys/sparc64/include tlb.h tte.h
sys/sparc64/sparc64 genassym.c pmap.c swtch.S
Log:
SVN rev 206010 on 2010-03-31 21:57:49Z by marius
MFC: r205258
- Add TTE and context register bits for the additional page sizes supported
by UltraSparc-IV and -IV+ as well as SPARC64 V, VI, VII and VIIIfx CPUs.
- Replace TLB_PCXR_PGSZ_MASK and TLB_SCXR_PGSZ_MASK with TLB_CXR_PGSZ_MASK
which just is the complement of TLB_CXR_CTX_MASK instead of trying to
assemble it from the page size bits which vary across CPUs.
- Add macros for the remainder of the SFSR bits, which are useful for at
least debugging purposes.
Revision Changes Path
1.26.22.4 +25 -13 src/sys/sparc64/include/tlb.h
1.16.22.3 +46 -17 src/sys/sparc64/include/tte.h
1.70.2.8 +1 -1 src/sys/sparc64/sparc64/genassym.c
1.166.2.14 +2 -2 src/sys/sparc64/sparc64/pmap.c
1.34.2.5 +1 -1 src/sys/sparc64/sparc64/swtch.S
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