Date: Thu, 20 Mar 2014 17:03:44 +0000 (UTC) From: Ruslan Bukin <br@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r263425 - in head/sys: arm/samsung/exynos boot/fdt/dts/arm Message-ID: <201403201703.s2KH3iS8025994@svn.freebsd.org>
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Author: br Date: Thu Mar 20 17:03:44 2014 New Revision: 263425 URL: http://svnweb.freebsd.org/changeset/base/263425 Log: - Add display-related and clk devices to the tree - Prevent resources intersection with EHCI driver Modified: head/sys/arm/samsung/exynos/ehci_exynos5.c head/sys/boot/fdt/dts/arm/exynos5250.dtsi Modified: head/sys/arm/samsung/exynos/ehci_exynos5.c ============================================================================== --- head/sys/arm/samsung/exynos/ehci_exynos5.c Thu Mar 20 17:01:21 2014 (r263424) +++ head/sys/arm/samsung/exynos/ehci_exynos5.c Thu Mar 20 17:03:44 2014 (r263425) @@ -61,8 +61,8 @@ __FBSDID("$FreeBSD$"); #define GPIO_MASK 0xf #define GPIO_OUTPUT 1 #define GPIO_INPUT 0 -#define GPX3CON 0x0C60 -#define GPX3DAT 0x0C64 +#define GPX3CON 0x0 +#define GPX3DAT 0x4 #define PIN_USB 5 /* PWR control */ @@ -71,7 +71,7 @@ __FBSDID("$FreeBSD$"); #define PHY_POWER_OFF 0 /* SYSREG */ -#define EXYNOS5_SYSREG_USB2_PHY 0x230 +#define EXYNOS5_SYSREG_USB2_PHY 0x0 #define USB2_MODE_HOST 0x1 /* USB HOST */ Modified: head/sys/boot/fdt/dts/arm/exynos5250.dtsi ============================================================================== --- head/sys/boot/fdt/dts/arm/exynos5250.dtsi Thu Mar 20 17:01:21 2014 (r263424) +++ head/sys/boot/fdt/dts/arm/exynos5250.dtsi Thu Mar 20 17:03:44 2014 (r263425) @@ -32,7 +32,16 @@ #size-cells = <1>; interrupt-parent = <&GIC>; - Exynos5@0 { + aliases { + soc = &SOC; + serial0 = &serial0; + serial1 = &serial1; + clk0 = &clk0; + dp0 = &dp0; + fimd0 = &fimd0; + }; + + SOC: Exynos5@0 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; @@ -48,6 +57,11 @@ #interrupt-cells = <1>; }; + clk0: clk@10010000 { + compatible = "exynos,clk"; + reg = < 0x10020000 0x20000 >; + }; + mct { compatible = "exynos,mct"; reg = < 0x101C0000 0x1000 >; @@ -72,8 +86,8 @@ reg = <0x12110000 0x1000>, /* EHCI */ <0x12130000 0x1000>, /* EHCI host ctrl */ <0x10040000 0x1000>, /* Power */ - <0x10050000 0x1000>, /* Sysreg */ - <0x11400000 0x1000>; /* GPIO left */ + <0x10050230 0x10>, /* Sysreg */ + <0x11400C60 0x10>; /* GPIO left */ interrupts = < 103 >; interrupt-parent = <&GIC>; }; @@ -153,5 +167,21 @@ current-speed = <115200>; }; + fimd0: fimd@14400000 { + compatible = "exynos,fimd"; + status = "disabled"; + reg = < 0x14400000 0x10000 >, /* fimd */ + < 0x14420000 0x10000 >, /* disp */ + < 0x10050000 0x220 >; /* sysreg */ + interrupt-parent = <&GIC>; + }; + + dp0: dp@145B0000 { + compatible = "exynos,dp"; + status = "disabled"; + reg = < 0x145B0000 0x10000 >, + < 0x10040720 0x10 >; /* PHY */ + interrupt-parent = <&GIC>; + }; }; };
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