Date: Wed, 25 Apr 2012 01:42:23 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r234664 - in head/sys/dev/ath: . ath_hal/ar5416 Message-ID: <201204250142.q3P1gNXt073935@svn.freebsd.org>
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Author: adrian Date: Wed Apr 25 01:42:22 2012 New Revision: 234664 URL: http://svn.freebsd.org/changeset/base/234664 Log: Add placeholder methods for WMI command access (USB, perhaps SDIO later) which will be needed for AR7010 and AR9287 USB access. The names differ slightly from Linux and Atheros, for the sake of consistency. A lot more work is required in order to convert the 11n HAL support to fully support USB. Modified: head/sys/dev/ath/ah_osdep.h head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Modified: head/sys/dev/ath/ah_osdep.h ============================================================================== --- head/sys/dev/ath/ah_osdep.h Wed Apr 25 01:24:39 2012 (r234663) +++ head/sys/dev/ath/ah_osdep.h Wed Apr 25 01:42:22 2012 (r234664) @@ -89,6 +89,20 @@ struct ath_hal; #endif /* _BYTE_ORDER */ /* + * For USB/SDIO support (where access latencies are quite high); + * some write accesses may be buffered and then flushed when + * either a read is done, or an explicit flush is done. + * + * These are simply placeholders for now. + */ +#define OS_REG_WRITE_BUFFER_ENABLE(_ah) \ + do { } while (0) +#define OS_REG_WRITE_BUFFER_DISABLE(_ah) \ + do { } while (0) +#define OS_REG_WRITE_BUFFER_FLUSH(_ah) \ + do { } while (0) + +/* * Register read/write operations are either handled through * platform-dependent routines (or when debugging is enabled * with AH_DEBUG); or they are inline expanded using the macros Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Wed Apr 25 01:24:39 2012 (r234663) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Wed Apr 25 01:42:22 2012 (r234664) @@ -581,6 +581,8 @@ ar5416SpurMitigate(struct ath_hal *ah, c AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK | AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK); + OS_REG_WRITE_BUFFER_ENABLE(ah); + OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0), new); new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL | @@ -765,6 +767,9 @@ ar5416SpurMitigate(struct ath_hal *ah, c | (mask_p[47] << 2) | (mask_p[46] << 0); OS_REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask); OS_REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask); + + OS_REG_WRITE_BUFFER_FLUSH(ah); + OS_REG_WRITE_BUFFER_DISABLE(ah); } /*
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