Date: Fri, 13 Aug 1999 14:01:28 -0500 From: Alan Cox <alc@cs.rice.edu> To: "Rodney W. Grimes" <rgrimes@gndrsh.aac.dev.com> Cc: cvs-committers@freebsd.org, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/vm vm_page.h Message-ID: <19990813140128.C27982@cs.rice.edu> In-Reply-To: <199908131458.HAA01346@gndrsh.aac.dev.com>; from Rodney W. Grimes on Fri, Aug 13, 1999 at 07:58:43AM -0700 References: <199908122116.OAA56955@freefall.freebsd.org> <199908131458.HAA01346@gndrsh.aac.dev.com>
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On Fri, Aug 13, 1999 at 07:58:43AM -0700, Rodney W. Grimes wrote: > > alc 1999/08/12 14:16:55 PDT > > > > Modified files: > > sys/vm vm_page.h > > Log: > > Make the default page coloring parameters match a (non-Xeon) Pentium II/III. > > > > This setting is also acceptable for Celerons and Pentium Pros > > with less than 1MB L2 caches. > > > > Note: PQ_L2_SIZE is a misnomer. The correct number of colors is > > a function of the cache's degree of associativity as well as its size. > > Yea... has anyone looked at creating the right color scheme for the > AMD K6-III 4-way L2 cache? If access to the correct hardware is an issue > I should be able to help with that. > In theory, a Celeron needs only 8 colors, a Pentium Pro with 256KB cache needs only 16 colors, and a K6-III is complicated. :-) The answer for a K6-III depends on whether the coloring wants or needs to take into account the direct-map L3 cache. If it doesn't, then 16 colors should suffice. If it does, then 128 (512KB L3) or 256 (1MB L3) are necessary. Do you know if the inclusion property holds between the on-chip L2 and the motherboard-level L3? As a rule, using a few too many colors is okay, but using too few colors is no good. Alan To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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