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Date:      Tue, 27 Jun 2006 18:43:43 +1000
From:      Peter Jeremy <peterjeremy@optushome.com.au>
To:        Dmitry Pryanishnikov <dmitry@atlantis.dp.ua>
Cc:        freebsd-acpi@freebsd.org, freebsd-stable@freebsd.org
Subject:   Re: FreeBSD 6.x CVSUP today crashes with zero load ...
Message-ID:  <20060627084343.GD714@turion.vk2pj.dyndns.org>
In-Reply-To: <20060626235355.Q95667@atlantis.atlantis.dp.ua>
References:  <E1FuYsL-000HT3-H2@dilbert.firstcallgroup.co.uk> <20060626100949.G24406@fledge.watson.org> <20060626081029.L1114@ganymede.hub.org> <20060626140333.M38418@fledge.watson.org> <20060626235355.Q95667@atlantis.atlantis.dp.ua>

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On Tue, 2006-Jun-27 00:01:08 +0300, Dmitry Pryanishnikov wrote:
>On Mon, 26 Jun 2006, Robert Watson wrote:
>>I think this is a useful activity, especially if you've already run=20
>>extensive memory testing on the box.  If you haven't yet done that, I=20
>>encourage you to take a break from buildworld's and make sure the memory=
=20
>>tests pass. I spent several months on and off trying to track down a bug =
a=20
>>few years ago, which turned out to be a one bit error in memory on the=20
>>box.  It would appear and
>
> This is precisely the task which hardware ECC solves: to correct any=20
> single-bit memory error and to detect 2-bit and most of several-bit error=
s.

Parity will detect any odd number of bits in error.  ECC can typically
correct correct one bit and detect 2 or any odd number of errors.

Note that ECC only checks the path between the RAM and DRAM controller
(eg northbridge).  You can also get errors between the northbridge and
the CPU (including the cache).  Some caches (eg Alpha) have parity to
help here.  Mainframes typically have ECC or parity on _all_ datapaths
(including through the ALU) to catch those errors.

--=20
Peter Jeremy

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