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Date:      Fri, 16 Jul 2010 15:46:10 GMT
From:      Jakub Wojciech Klama <jceel@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 181053 for review
Message-ID:  <201007161546.o6GFkAAs058402@repoman.freebsd.org>

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http://p4web.freebsd.org/@@181053?ac=10

Change 181053 by jceel@jceel on 2010/07/16 15:46:06

	* Make obio bus capable of assigning DMA channels to child devices
	* Fill in DMA channel numbers for various on-board devices in DM644x

Affected files ...

.. //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davinci_obio.c#2 edit
.. //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davincireg.h#3 edit
.. //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davincivar.h#2 edit
.. //depot/projects/soc2010/jceel_dma/sys/arm/include/resource.h#2 edit

Differences ...

==== //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davinci_obio.c#2 (text+ko) ====

@@ -40,6 +40,8 @@
 #include <arm/davinci/davincireg.h>
 #include <arm/davinci/davincivar.h>
 
+#include <dev/gpdma/gpdma.h>
+
 struct obio_softc {
 	device_t		ob_dev;
 	struct rman		ob_mem_rman;
@@ -119,6 +121,11 @@
 			    od->od_irqs[i], 1);
 		}
 
+		for (i = 0; od->od_edma[i] != -1; i++) {
+			BUS_SET_RESOURCE(dev, child, SYS_RES_DMA, i,
+			    od->od_edma[i], 1);
+		}
+
 		iv = device_get_ivars(child);
 		iv->iv_psc = od->od_psc;
 	}
@@ -147,6 +154,9 @@
 	case SYS_RES_IRQ:
 		rm = &sc->ob_irq_rman;
 		break;
+	case SYS_RES_DMA:
+		rm = NULL;
+		break;
 	default:
 		return (NULL);
 	}
@@ -163,6 +173,9 @@
 		end = rle->end;
 	}
 
+	if (type == SYS_RES_DMA)
+		return gpdma_alloc_channel("edma0", start);
+
 	rv = rman_reserve_resource(rm, start, end, count, flags, child);
 	if (!rv) {
 		device_printf(bus,

==== //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davincireg.h#3 (text+ko) ====

@@ -162,6 +162,42 @@
 #define	DAVINCI_NIRQS				64
 
 /*
+ * EDMA3 channel assignments
+ */
+#define	DAVINCI_ASPXEVT				2
+#define	DAVINCI_ASPREVT				3
+#define	DAVINCI_HISTEVT				4
+#define	DAVINCI_H3AEVT				5
+#define	DAVINCI_PRVUEVT				6
+#define	DAVINCI_RSZEVT				7
+#define	DAVINCI_IMXEVT				8
+#define	DAVINCI_VLCDEVT				9
+#define	DAVINCI_ASQEVT				10
+#define	DAVINCI_DSQEVT				11
+/* 12-15 - reserved */
+#define	DAVINCI_SPIXEVT				16
+#define	DAVINCI_SPIREVT				17
+#define	DAVINCI_URXEVT0				18
+#define	DAVINCI_UTXEVT0				19
+#define	DAVINCI_URXEVT1				20
+#define	DAVINCI_UTXEVT1				21
+#define	DAVINCI_URXEVT2				22
+#define	DAVINCI_UTXEVT2				23
+/* 24-25 - reserved */
+#define	DAVINCI_MMCRXEVT			26
+#define	DAVINCI_MMCTXEVT			27
+#define	DAVINCI_I2CREVT				28
+#define	DAVINCI_I2CXEVT				29
+/* 30-31 - reserved */
+#define	DAVINCI_GPEVT0				32
+#define	DAVINCI_GPEVT1				33
+#define	DAVINCI_GPEVT2				34
+#define	DAVINCI_GPEVT3				35
+/* XXX */
+
+
+
+/*
  * DM644x ARM interrupt controller registers
  */
 #define	DAVINCI_FIQ0_STATUS			0x00

==== //depot/projects/soc2010/jceel_dma/sys/arm/davinci/davincivar.h#2 (text+ko) ====

@@ -38,6 +38,8 @@
 	int			od_irqs[7];
 	/* PSC controller module numbers */
 	int			od_psc[7];
+	/* EDMA channel numbers */
+	int			od_edma[7];
 };
 
 #define	DAVINCI_SYSCLK1		1

==== //depot/projects/soc2010/jceel_dma/sys/arm/include/resource.h#2 (text+ko) ====

@@ -42,5 +42,6 @@
 #define	SYS_RES_MEMORY	3	/* i/o memory */
 #define	SYS_RES_IOPORT	4	/* i/o ports */
 #define	SYS_RES_GPIO	5	/* general purpose i/o */
+#define	SYS_RES_DMA	6	/* general purpose dma channels */
 
 #endif /* !_MACHINE_RESOURCE_H_ */



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