Date: Wed, 14 May 2008 12:51:25 GMT From: Andrew Thompson <thompsa@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 141594 for review Message-ID: <200805141251.m4ECpP37098315@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=141594 Change 141594 by thompsa@thompsa_burger on 2008/05/14 12:50:37 Sync to dfbsd, initialize 11b PHY rev4 according to v3 specification. Affected files ... .. //depot/projects/vap/sys/dev/bwi/bwiphy.c#3 edit .. //depot/projects/vap/sys/dev/bwi/bwirf.c#4 edit .. //depot/projects/vap/sys/dev/bwi/bwirf.h#2 edit .. //depot/projects/vap/sys/dev/bwi/if_bwivar.h#8 edit Differences ... ==== //depot/projects/vap/sys/dev/bwi/bwiphy.c#3 (text+ko) ==== @@ -437,9 +437,70 @@ static void bwi_phy_init_11b_rev4(struct bwi_mac *mac) { - /* TODO:11B */ - if_printf(mac->mac_sc->sc_ifp, - "%s is not implemented yet\n", __func__); + struct bwi_softc *sc = mac->mac_sc; + struct bwi_rf *rf = &mac->mac_rf; + uint16_t val, ofs; + u_int chan; + + CSR_WRITE_2(sc, BWI_BPHY_CTRL, BWI_BPHY_CTRL_INIT); + + PHY_WRITE(mac, 0x20, 0x301c); + PHY_WRITE(mac, 0x26, 0); + PHY_WRITE(mac, 0x30, 0xc6); + PHY_WRITE(mac, 0x88, 0x3e00); + + for (ofs = 0, val = 0x3c3d; ofs < 30; ++ofs, val -= 0x202) + PHY_WRITE(mac, 0x89 + ofs, val); + + CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL1); + + chan = rf->rf_curchan; + if (chan == IEEE80211_CHAN_ANY) + chan = 6; /* Force to channel 6 */ + bwi_rf_set_chan(mac, chan, 0); + + if (rf->rf_type != BWI_RF_T_BCM2050) { + RF_WRITE(mac, 0x75, 0x80); + RF_WRITE(mac, 0x79, 0x81); + } + + RF_WRITE(mac, 0x50, 0x20); + RF_WRITE(mac, 0x50, 0x23); + + if (rf->rf_type == BWI_RF_T_BCM2050) { + RF_WRITE(mac, 0x50, 0x20); + RF_WRITE(mac, 0x5a, 0x70); + RF_WRITE(mac, 0x5b, 0x7b); + RF_WRITE(mac, 0x5c, 0xb0); + RF_WRITE(mac, 0x7a, 0xf); + PHY_WRITE(mac, 0x38, 0x677); + bwi_rf_init_bcm2050(mac); + } + + PHY_WRITE(mac, 0x14, 0x80); + PHY_WRITE(mac, 0x32, 0xca); + if (rf->rf_type == BWI_RF_T_BCM2050) + PHY_WRITE(mac, 0x32, 0xe0); + PHY_WRITE(mac, 0x35, 0x7c2); + + bwi_rf_lo_update(mac); + + PHY_WRITE(mac, 0x26, 0xcc00); + if (rf->rf_type == BWI_RF_T_BCM2050) + PHY_WRITE(mac, 0x26, 0xce00); + + CSR_WRITE_2(sc, BWI_RF_CHAN_EX, 0x1100); + + PHY_WRITE(mac, 0x2a, 0x88a3); + if (rf->rf_type == BWI_RF_T_BCM2050) + PHY_WRITE(mac, 0x2a, 0x88c2); + + bwi_mac_set_tpctl_11bg(mac, NULL); + if (sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) { + bwi_rf_calc_nrssi_slope(mac); + bwi_rf_set_nrssi_thr(mac); + } + bwi_mac_init_tpctl_11bg(mac); } static void ==== //depot/projects/vap/sys/dev/bwi/bwirf.c#4 (text+ko) ==== @@ -82,8 +82,12 @@ #define BWI_DEFAULT_IDLE_TSSI 52 struct rf_saveregs { + uint16_t phy_01; + uint16_t phy_03; + uint16_t phy_0a; uint16_t phy_15; uint16_t phy_2a; + uint16_t phy_30; uint16_t phy_35; uint16_t phy_60; uint16_t phy_429; @@ -109,11 +113,15 @@ static int bwi_rf_gain_max_reached(struct bwi_mac *, int); static uint16_t bwi_rf_calibval(struct bwi_mac *); static uint16_t bwi_rf_get_tp_ctrl2(struct bwi_mac *); + +static void bwi_rf_lo_update_11b(struct bwi_mac *); +static uint16_t bwi_rf_lo_measure_11b(struct bwi_mac *); + +static void bwi_rf_lo_update_11g(struct bwi_mac *); static uint32_t bwi_rf_lo_devi_measure(struct bwi_mac *, uint16_t); -static void bwi_rf_lo_measure(struct bwi_mac *, +static void bwi_rf_lo_measure_11g(struct bwi_mac *, const struct bwi_rf_lo *, struct bwi_rf_lo *, uint8_t); -static uint8_t _bwi_rf_lo_update(struct bwi_mac *, uint16_t); - +static uint8_t _bwi_rf_lo_update_11g(struct bwi_mac *, uint16_t); static void bwi_rf_lo_write(struct bwi_mac *, const struct bwi_rf_lo *); static void bwi_rf_set_nrssi_ofs_11g(struct bwi_mac *); @@ -213,6 +221,7 @@ bwi_rf_attach(struct bwi_mac *mac) { struct bwi_softc *sc = mac->mac_sc; + struct bwi_phy *phy = &mac->mac_phy; struct bwi_rf *rf = &mac->mac_rf; uint16_t type, manu; uint8_t rev; @@ -254,7 +263,7 @@ */ rf->rf_ctrl_rd = 0; rf->rf_ctrl_adj = 0; - switch (mac->mac_phy.phy_mode) { + switch (phy->phy_mode) { case IEEE80211_MODE_11A: if (manu != BWI_RF_MANUFACT_BCM || type != BWI_RF_T_BCM2060 || @@ -284,6 +293,10 @@ rf->rf_off = bwi_rf_off_11bg; rf->rf_calc_nrssi_slope = bwi_rf_calc_nrssi_slope_11b; rf->rf_set_nrssi_thr = bwi_rf_set_nrssi_thr_11b; + if (phy->phy_rev == 6) + rf->rf_lo_update = bwi_rf_lo_update_11g; + else + rf->rf_lo_update = bwi_rf_lo_update_11b; break; case IEEE80211_MODE_11G: if (type != BWI_RF_T_BCM2050) { @@ -300,6 +313,7 @@ rf->rf_calc_nrssi_slope = bwi_rf_calc_nrssi_slope_11g; rf->rf_set_nrssi_thr = bwi_rf_set_nrssi_thr_11g; rf->rf_calc_rssi = bwi_rf_calc_rssi_bcm2050; + rf->rf_lo_update = bwi_rf_lo_update_11g; break; default: device_printf(sc->sc_dev, "unsupported PHY mode\n"); @@ -1234,8 +1248,8 @@ return error; } -void -bwi_rf_lo_update(struct bwi_mac *mac) +static void +bwi_rf_lo_update_11g(struct bwi_mac *mac) { struct bwi_softc *sc = mac->mac_sc; struct ifnet *ifp = sc->sc_ifp; @@ -1314,7 +1328,7 @@ /* * Measure all RF LO */ - devi_ctrl = _bwi_rf_lo_update(mac, regs.rf_7a); + devi_ctrl = _bwi_rf_lo_update_11g(mac, regs.rf_7a); /* * Restore saved RF/PHY registers @@ -1428,7 +1442,7 @@ } static uint8_t -_bwi_rf_lo_update(struct bwi_mac *mac, uint16_t orig_rf7a) +_bwi_rf_lo_update_11g(struct bwi_mac *mac, uint16_t orig_rf7a) { #define RF_ATTEN_LISTSZ 14 #define BBP_ATTEN_MAX 4 /* half */ @@ -1515,7 +1529,7 @@ lo = bwi_get_rf_lo(mac, rf_lo_measure_order[idx], bbp_atten * 2); - bwi_rf_lo_measure(mac, &lo_save, lo, devi_ctrl); + bwi_rf_lo_measure_11g(mac, &lo_save, lo, devi_ctrl); } } return devi_ctrl; @@ -1525,7 +1539,7 @@ } static void -bwi_rf_lo_measure(struct bwi_mac *mac, const struct bwi_rf_lo *src_lo, +bwi_rf_lo_measure_11g(struct bwi_mac *mac, const struct bwi_rf_lo *src_lo, struct bwi_rf_lo *dst_lo, uint8_t devi_ctrl) { #define LO_ADJUST_MIN 1 @@ -2518,3 +2532,144 @@ rssi -= 256; return rssi; } + +static uint16_t +bwi_rf_lo_measure_11b(struct bwi_mac *mac) +{ + uint16_t val; + int i; + + val = 0; + for (i = 0; i < 10; ++i) { + PHY_WRITE(mac, 0x15, 0xafa0); + DELAY(1); + PHY_WRITE(mac, 0x15, 0xefa0); + DELAY(10); + PHY_WRITE(mac, 0x15, 0xffa0); + DELAY(40); + + val += PHY_READ(mac, 0x2c); + } + return val; +} + +static void +bwi_rf_lo_update_11b(struct bwi_mac *mac) +{ + struct bwi_softc *sc = mac->mac_sc; + struct bwi_rf *rf = &mac->mac_rf; + struct rf_saveregs regs; + uint16_t rf_val, phy_val, min_val, val; + uint16_t rf52, bphy_ctrl; + int i; + + DPRINTF(sc, BWI_DBG_RF | BWI_DBG_INIT, "%s enter\n", __func__); + + bzero(®s, sizeof(regs)); + bphy_ctrl = 0; + + /* + * Save RF/PHY registers for later restoration + */ + SAVE_PHY_REG(mac, ®s, 15); + rf52 = RF_READ(mac, 0x52) & 0xfff0; + if (rf->rf_type == BWI_RF_T_BCM2050) { + SAVE_PHY_REG(mac, ®s, 0a); + SAVE_PHY_REG(mac, ®s, 2a); + SAVE_PHY_REG(mac, ®s, 35); + SAVE_PHY_REG(mac, ®s, 03); + SAVE_PHY_REG(mac, ®s, 01); + SAVE_PHY_REG(mac, ®s, 30); + + SAVE_RF_REG(mac, ®s, 43); + SAVE_RF_REG(mac, ®s, 7a); + + bphy_ctrl = CSR_READ_2(sc, BWI_BPHY_CTRL); + + SAVE_RF_REG(mac, ®s, 52); + regs.rf_52 &= 0xf0; + + PHY_WRITE(mac, 0x30, 0xff); + CSR_WRITE_2(sc, BWI_PHY_CTRL, 0x3f3f); + PHY_WRITE(mac, 0x35, regs.phy_35 & 0xff7f); + RF_WRITE(mac, 0x7a, regs.rf_7a & 0xfff0); + } + + PHY_WRITE(mac, 0x15, 0xb000); + + if (rf->rf_type == BWI_RF_T_BCM2050) { + PHY_WRITE(mac, 0x2b, 0x203); + PHY_WRITE(mac, 0x2a, 0x8a3); + } else { + PHY_WRITE(mac, 0x2b, 0x1402); + } + + /* + * Setup RF signal + */ + rf_val = 0; + min_val = UINT16_MAX; + + for (i = 0; i < 4; ++i) { + RF_WRITE(mac, 0x52, rf52 | i); + bwi_rf_lo_measure_11b(mac); /* Ignore return value */ + } + for (i = 0; i < 10; ++i) { + RF_WRITE(mac, 0x52, rf52 | i); + + val = bwi_rf_lo_measure_11b(mac) / 10; + if (val < min_val) { + min_val = val; + rf_val = i; + } + } + RF_WRITE(mac, 0x52, rf52 | rf_val); + + /* + * Setup PHY signal + */ + phy_val = 0; + min_val = UINT16_MAX; + + for (i = -4; i < 5; i += 2) { + int j; + + for (j = -4; j < 5; j += 2) { + uint16_t phy2f; + + phy2f = (0x100 * i) + j; + if (j < 0) + phy2f += 0x100; + PHY_WRITE(mac, 0x2f, phy2f); + + val = bwi_rf_lo_measure_11b(mac) / 10; + if (val < min_val) { + min_val = val; + phy_val = phy2f; + } + } + } + PHY_WRITE(mac, 0x2f, phy_val + 0x101); + + /* + * Restore saved RF/PHY registers + */ + if (rf->rf_type == BWI_RF_T_BCM2050) { + RESTORE_PHY_REG(mac, ®s, 0a); + RESTORE_PHY_REG(mac, ®s, 2a); + RESTORE_PHY_REG(mac, ®s, 35); + RESTORE_PHY_REG(mac, ®s, 03); + RESTORE_PHY_REG(mac, ®s, 01); + RESTORE_PHY_REG(mac, ®s, 30); + + RESTORE_RF_REG(mac, ®s, 43); + RESTORE_RF_REG(mac, ®s, 7a); + + RF_FILT_SETBITS(mac, 0x52, 0xf, regs.rf_52); + + CSR_WRITE_2(sc, BWI_BPHY_CTRL, bphy_ctrl); + } + RESTORE_PHY_REG(mac, ®s, 15); + + bwi_rf_work_around(mac, rf->rf_curchan); +} ==== //depot/projects/vap/sys/dev/bwi/bwirf.h#2 (text+ko) ==== @@ -31,8 +31,7 @@ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $DragonFly: src/sys/dev/netif/bwi/bwirf.h,v 1.2 2007/09/15 09:59:29 sephe Exp $ - * 1.3 is not merged + * $DragonFly: src/sys/dev/netif/bwi/bwirf.h,v 1.3 2007/10/03 04:53:19 sephe Exp $ */ #ifndef _BWI_RF_H @@ -47,7 +46,6 @@ void bwi_rf_get_gains(struct bwi_mac *); void bwi_rf_init(struct bwi_mac *); void bwi_rf_init_bcm2050(struct bwi_mac *); -void bwi_rf_lo_update(struct bwi_mac *); void bwi_rf_init_hw_nrssi_table(struct bwi_mac *, uint16_t); void bwi_rf_set_ant_mode(struct bwi_mac *, int); @@ -97,6 +95,12 @@ return _mac->mac_rf.rf_calc_rssi(_mac, _hdr); } +static __inline void +bwi_rf_lo_update(struct bwi_mac *_mac) +{ + return _mac->mac_rf.rf_lo_update(_mac); +} + #define RF_WRITE(mac, ofs, val) bwi_rf_write((mac), (ofs), (val)) #define RF_READ(mac, ofs) bwi_rf_read((mac), (ofs)) ==== //depot/projects/vap/sys/dev/bwi/if_bwivar.h#8 (text+ko) ==== @@ -421,6 +421,8 @@ (struct bwi_mac *, const struct bwi_rxbuf_hdr *); + void (*rf_lo_update)(struct bwi_mac *); + #define BWI_TSSI_MAX 64 int8_t rf_txpower_map0[BWI_TSSI_MAX]; /* Indexed by TSSI */
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