Date: Wed, 4 Dec 2002 15:01:59 -0500 (EST) From: "Michael Richards" <michael@fastmail.ca> To: tlambert2@mindspring.com Cc: jhb@FreeBSD.org, freebsd-smp@freebsd.org Subject: Re: Intel SE7500CW2 narrowed down... Message-ID: <3DEE5F37.000003.43942@ns.interchange.ca>
index | next in thread | raw e-mail
>> I'm not convinced it's a tables problem as I read the spec and
>> verified the CPU entries in this table byte for byte. It appears
>> valid. Besides, Linux works and so do a host of other OSes. More
>> than likely we're just doing something slightly different that
>> happens to work find with all the other boards out there.
>>
>> My next step is to start looking at how linux works and compare
>> it to how FreeBSD doesn't work.
>
> You will find it in the APIC I/O code and the interrupt routing
> code, with a tiny part in the shipset initialization.
>
> You could fix it in FreeBSD by disregarding what the BIOS says,
> and manually initializing the ServerWorks chipset the way FreeBSD
> wants it (i.e. MPSpec v1.4, mode 2 interrupt processing
> compliant). FreeBSD doesn't run in real "virtual wire mode", it
> makes the interrupts follow Giant.
Wow, looks like someone who really knows what they're talking about
stepped up here. So I know we could look at the BIOS to find if the
user actually has this buggy board. This being the case we could then
decide to hardcode whatever is wrong in the APIC tables so we can
talk to the hardware.
I didn't look at the APIC I/O code and it may take a while for me to
actually understand it. Would you be interested in or able to write
something describing the problem so it can be submitted to Intel in
the unlikely event that they would actually fix it?
-Michael
_________________________________________________________________
http://fastmail.ca/ - Fast Secure Web Email for Canadians
help
Want to link to this message? Use this
URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?3DEE5F37.000003.43942>