Date: Wed, 08 Nov 2006 21:52:21 +0000 From: Ian Dowse <iedowse@iedowse.com> To: Vladimir Kushnir <vkushnir@i.kiev.ua> Cc: John-Mark Gurney <gurney_j@resnet.uoregon.edu>, current@freebsd.org Subject: Re: Asus A8V hangs during pci probe on fresh -CURRENT Message-ID: <200611082152.aa94781@nowhere.iedowse.com> In-Reply-To: Your message of "Mon, 06 Nov 2006 01:57:46 %2B0200." <20061106015245.R1183@kushnir1.kiev.ua>
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In message <20061106015245.R1183@kushnir1.kiev.ua>, Vladimir Kushnir writes:
>On Sat, 4 Nov 2006, John-Mark Gurney wrote:
>> Ok, then add a couple printfs to the pci_read_vpd_reg line... one before
>> the WREG line, and another before the return... I have a feeling that
>> your card isn't setting the correct bit, as the printf you enabled w/
>
>Your feeling was absolutely right - system hangs exactly here.
Maybe something like the following would help? This adds a timeout
to pci_read_vpd_reg() so it might prevent the complete hang.
Ian
Index: pci.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/pci/pci.c,v
retrieving revision 1.320
diff -u -r1.320 pci.c
--- pci.c 7 Nov 2006 18:55:51 -0000 1.320
+++ pci.c 8 Nov 2006 21:48:11 -0000
@@ -495,12 +495,19 @@
pci_read_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg)
{
#define WREG(n, v, w) PCIB_WRITE_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, v, w)
+ int timo;
KASSERT((reg & 3) == 0, ("VPD register must by 4 byte aligned"));
WREG(cfg->vpd.vpd_reg + 2, reg, 2);
- while ((REG(cfg->vpd.vpd_reg + 2, 2) & 0x8000) != 0x8000)
+ timo = 1000000;
+ while (--timo > 0 && (REG(cfg->vpd.vpd_reg + 2, 2) & 0x8000) != 0x8000)
DELAY(1); /* limit looping */
+ if (timo == 0) {
+ printf("pci%d:%d:%d: read VPD reg %d timed out\n", cfg->bus,
+ cfg->slot, cfg->func, reg);
+ return 0xffffffff;
+ }
return REG(cfg->vpd.vpd_reg + 4, 4);
}
@@ -509,12 +516,18 @@
static void
pci_write_vpd_reg(device_t pcib, pcicfgregs *cfg, int reg, uint32_t data)
{
+ int timo;
+
KASSERT((reg & 3) == 0, ("VPD register must by 4 byte aligned"));
WREG(cfg->vpd.vpd_reg + 4, data, 4);
WREG(cfg->vpd.vpd_reg + 2, reg | 0x8000, 2);
- while ((REG(cfg->vpd.vpd_reg + 2, 2) & 0x8000) == 0x8000)
+ timo = 1000000;
+ while (--timo > 0 && (REG(cfg->vpd.vpd_reg + 2, 2) & 0x8000) == 0x8000)
DELAY(1); /* limit looping */
+ if (timo == 0)
+ printf("pci%d:%d:%d: write VPD reg %d timed out\n", cfg->bus,
+ cfg->slot, cfg->func, reg);
return;
}
@@ -630,7 +643,8 @@
state = 5;
break;
default: /* XXX - unimplemented */
- state = 4;
+ end = 1;
+ cksumvalid = 0;
break;
}
break;
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