Date: Wed, 22 Mar 1995 16:10:18 +1000 From: Bruce Evans <bde@zeta.org.au> To: davidg@freefall.cdrom.com, rgrimes@gndrsh.aac.dev.com Cc: CVS-commiters@freefall.cdrom.com, cvs-sys@freefall.cdrom.com Subject: Re: cvs commit: src/sys/i386/isa wd.c wdreg.h Message-ID: <199503220610.QAA04588@godzilla.zeta.org.au>
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>> Correct delay to use port 0x84, reading the status register >> might not be a long enough delay. >Port 0x84 will not cause the 1.25uS delay on some PCI motherboards, >I beleive all Intel Neptune and Triton based boards know that this >is not an ISA address and end up running only a PCI I/O cycle for >it. What are the cycle timings for all PC buses? ISA: 6 min + normally 4 extra = 1.25uS at 8MHz ? EISA? PCI? Bruce
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