Date: Thu, 29 Mar 2007 13:50:17 GMT From: Oleksandr Tymoshenko <gonzo@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 116831 for review Message-ID: <200703291350.l2TDoHp3024959@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=116831 Change 116831 by gonzo@gonzo_jeeves on 2007/03/29 13:49:17 o Use vm_offset_t instead of vm_paddr_t o Add *_intern_* family of cache operations which are required by mipsNN. o Replace cache ops stubs with implementations. Affected files ... .. //depot/projects/mips2/src/sys/mips/include/cache.h#3 edit Differences ... ==== //depot/projects/mips2/src/sys/mips/include/cache.h#3 (text+ko) ==== @@ -125,21 +125,30 @@ struct mips_cache_ops { void (*mco_icache_sync_all)(void); - void (*mco_icache_sync_range)(vm_paddr_t, vm_size_t); - void (*mco_icache_sync_range_index)(vm_paddr_t, vm_size_t); + void (*mco_icache_sync_range)(vm_offset_t, vm_size_t); + void (*mco_icache_sync_range_index)(vm_offset_t, vm_size_t); void (*mco_pdcache_wbinv_all)(void); - void (*mco_pdcache_wbinv_range)(vm_paddr_t, vm_size_t); - void (*mco_pdcache_wbinv_range_index)(vm_paddr_t, vm_size_t); - void (*mco_pdcache_inv_range)(vm_paddr_t, vm_size_t); - void (*mco_pdcache_wb_range)(vm_paddr_t, vm_size_t); + void (*mco_pdcache_wbinv_range)(vm_offset_t, vm_size_t); + void (*mco_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t); + void (*mco_pdcache_inv_range)(vm_offset_t, vm_size_t); + void (*mco_pdcache_wb_range)(vm_offset_t, vm_size_t); /* These are called only by the (mipsNN) icache functions. */ + void (*mco_intern_pdcache_wbinv_all)(void); + void (*mco_intern_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t); + void (*mco_intern_pdcache_wb_range)(vm_offset_t, vm_size_t); + void (*mco_sdcache_wbinv_all)(void); - void (*mco_sdcache_wbinv_range)(vm_paddr_t, vm_size_t); - void (*mco_sdcache_wbinv_range_index)(vm_paddr_t, vm_size_t); - void (*mco_sdcache_inv_range)(vm_paddr_t, vm_size_t); - void (*mco_sdcache_wb_range)(vm_paddr_t, vm_size_t); + void (*mco_sdcache_wbinv_range)(vm_offset_t, vm_size_t); + void (*mco_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t); + void (*mco_sdcache_inv_range)(vm_offset_t, vm_size_t); + void (*mco_sdcache_wb_range)(vm_offset_t, vm_size_t); + + /* These are called only by the (mipsNN) icache functions. */ + void (*mco_intern_sdcache_wbinv_all)(void); + void (*mco_intern_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t); + void (*mco_intern_sdcache_wb_range)(vm_offset_t, vm_size_t); }; extern struct mips_cache_ops mips_cache_ops; @@ -204,10 +213,6 @@ (*mips_cache_ops.mco_ ## prefix ## s ## x )((a), (b)); \ } while (/*CONSTCOND*/0) -/* - * XXXMIPS: remove this calles while mipc cache ops are not defined - */ -#ifdef notyet #define mips_icache_sync_all() \ (*mips_cache_ops.mco_icache_sync_all)() @@ -231,18 +236,24 @@ #define mips_dcache_wb_range(v, s) \ __mco_2args(, dcache_wb_range, (v), (s)) -#else -#define mips_icache_sync_all() -#define mips_icache_sync_range(v, s) -#define mips_icache_sync_range_index(v, s) -#define mips_dcache_wbinv_all() -#define mips_dcache_wbinv_range(v, s) -#define mips_dcache_wbinv_range_index(v, s) -#define mips_dcache_inv_range(v, s) -#define mips_dcache_wb_range(v, s) -#endif + +/* + * Private D-cache functions only called from (currently only the + * mipsNN) I-cache functions. + */ +#define mips_intern_dcache_wbinv_all() \ + __mco_noargs(intern_, dcache_wbinv_all) + +#define mips_intern_dcache_wbinv_range_index(v, s) \ + __mco_2args(intern_, dcache_wbinv_range_index, (v), (s)) + +#define mips_intern_dcache_wb_range(v, s) \ + __mco_2args(intern_, dcache_wb_range, (v), (s)) +/* forward declaration */ +struct mips_cpuinfo; +void mips_config_cache(struct mips_cpuinfo *); +void mips_dcache_compute_align(void); -void mips_config_cache(void); -void mips_dcache_compute_align(void); +#include <machine/cache_mipsNN.h>
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