Date: Mon, 19 Feb 2024 16:44:47 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 371bcfc8a245 - stable/13 - arm64: Fix the TCR_TBI0 macro to use UL Message-ID: <202402191644.41JGil2o093862@gitrepo.freebsd.org>
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The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=371bcfc8a2450fbf0dd741dd0f25a5dccbc4b984 commit 371bcfc8a2450fbf0dd741dd0f25a5dccbc4b984 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-09-08 13:27:15 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2024-02-19 12:38:03 +0000 arm64: Fix the TCR_TBI0 macro to use UL This needs to be 1UL to ensure the type is large enough for the shift. Sponsored by: Arm Ltd (cherry picked from commit aea540538991dd9e8cf21c6ca06e09f706bf2d18) --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 314330021495..be070a451691 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -2086,7 +2086,7 @@ #define TCR_TBI1_SHIFT 38 #define TCR_TBI1 (1UL << TCR_TBI1_SHIFT) #define TCR_TBI0_SHIFT 37 -#define TCR_TBI0 (1U << TCR_TBI0_SHIFT) +#define TCR_TBI0 (1UL << TCR_TBI0_SHIFT) #define TCR_ASID_SHIFT 36 #define TCR_ASID_WIDTH 1 #define TCR_ASID_16 (1UL << TCR_ASID_SHIFT)
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