Date: Wed, 14 Apr 2010 07:29:25 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r206596 - user/jmallett/octeon/sys/mips/mips Message-ID: <201004140729.o3E7TPCv003861@svn.freebsd.org>
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Author: jmallett Date: Wed Apr 14 07:29:25 2010 New Revision: 206596 URL: http://svn.freebsd.org/changeset/base/206596 Log: o) Remove some gratuitous cpu_barrier calls. o) Remove an XXX about invalidating half of the TLB entry only -- this turns out to not be a win. Modified: user/jmallett/octeon/sys/mips/mips/tlb.c Modified: user/jmallett/octeon/sys/mips/mips/tlb.c ============================================================================== --- user/jmallett/octeon/sys/mips/mips/tlb.c Wed Apr 14 07:07:43 2010 (r206595) +++ user/jmallett/octeon/sys/mips/mips/tlb.c Wed Apr 14 07:29:25 2010 (r206596) @@ -51,7 +51,6 @@ tlb_probe(void) { __asm __volatile ("tlbp" : : : "memory"); mips_cp0_sync(); - mips_barrier(); } static inline void @@ -59,7 +58,6 @@ tlb_read(void) { __asm __volatile ("tlbr" : : : "memory"); mips_cp0_sync(); - mips_barrier(); } static inline void @@ -67,7 +65,6 @@ tlb_write_indexed(void) { __asm __volatile ("tlbwi" : : : "memory"); mips_cp0_sync(); - mips_barrier(); } static inline void @@ -75,17 +72,10 @@ tlb_write_random(void) { __asm __volatile ("tlbwr" : : : "memory"); mips_cp0_sync(); - mips_barrier(); } static void tlb_invalidate_one(unsigned); -/* - * XXX - * We invalidate the whole pair. Would be nice to just - * invalidate the single entry instead of forcing a reload - * of the other one. - */ void tlb_invalidate_address(struct pmap *pmap, vm_offset_t va) {
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