Date: Thu, 24 Jan 2002 13:19:51 -0800 (PST) From: Naohiko Tsuji <naohikotsuji@ybb.ne.jp> To: freebsd-gnats-submit@FreeBSD.org Subject: kern/34236: ADMtek AN98x, enable automatically TX underrun recovery Message-ID: <200201242119.g0OLJpm60168@freefall.freebsd.org>
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>Number: 34236
>Category: kern
>Synopsis: ADMtek AN98x, enable automatically TX underrun recovery
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: freebsd-bugs
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: sw-bug
>Submitter-Id: current-users
>Arrival-Date: Thu Jan 24 13:20:00 PST 2002
>Closed-Date:
>Last-Modified:
>Originator: Naohiko Tsuji
>Release: 4.5-RC
>Organization:
>Environment:
FreeBSD 4.5-RC i386
>Description:
dc0: TX underrun -- increasing TX threshold
...
dc0: TX underrun -- increasing TX threshold
...
dc0: TX underrun -- using store and forward mode
...
Working heavily.
I think many interrupts have occurred.
M/B: ASUS P2B-B (440BX)
CPU: Celeron 300A
NIC: Planex FNW-9802-T (ADMtek 983)
or
NIC: Planex FNW-9800-T (ADMtek 981)
>How-To-Repeat:
>Fix:
AN983 PCI/mini-PCI 10/100 Fast Ethernet Controller With Integrated PHY
Revision 1.3 June 2000
AN983B/AN983BL PCI/mini-PCI-to-Ethernet LAN Controller
Revision 1.3 Sep. 2001
7. Registers and Descriptors Description
7.2 PCI Control/Status registers
7.2.2 Control/Status registers description
AN985 CardBus 10/100 Fast Ethernet Controller With Integrated PHY
Revision 1.2 May 2000
7. Registers and Descriptors Description
7.2 PCI/CardBus Control/Status registers
7.2.2 Control/Status registers descripti
AN985B CardBus-to-Ethernet LAN Controller
Revision 1.5 Oct. 2001
PCI / CARDBUS CONTROL/STATUS REGISTERS
CONTROL/STATUS REGISTER DESCRIPTION
CSR18(offset = 88h), CR - Command Register, bit31 to bit16 automatically recall from EEPROM
Bit Name Descriptions Default Val RW Type
0 ATUR 1: enable automatically transmit-underrun 0 R/W
recovery.
== RELENG_4 ==
--- sys/pci/if_dcreg.h.orig
+++ sys/pci/if_dcreg.h
@@ -498,6 +498,7 @@
* ADMtek specific registers and constants for the AL981 and AN985.
* The AN985 doesn't use the magic PHY registers.
*/
+#define DC_AL_CR 0x88 /* Command register */
#define DC_AL_PAR0 0xA4 /* station address */
#define DC_AL_PAR1 0xA8 /* station address */
#define DC_AL_MAR0 0xAC /* multicast hash filter */
@@ -512,6 +513,7 @@
#define DC_ADMTEK_PHYADDR 0x1
#define DC_AL_EE_NODEADDR 4
+#define DC_AL_CR_ATUR 0x00000001 /* Enable automatically TX underrun recovery */
/* End of ADMtek specific registers */
/*
--- sys/pci/if_dc.c.orig
+++ sys/pci/if_dc.c
@@ -1342,6 +1342,9 @@
}
}
+ if (DC_IS_ADMTEK(sc))
+ DC_SETBIT(sc, DC_AL_CR, DC_AL_CR_ATUR);
+
if ((media & IFM_GMASK) == IFM_FDX) {
DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc))
Obtained from Linux 2.4.17
drivers/net/tulip/tulip_core.c
>Release-Note:
>Audit-Trail:
>Unformatted:
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