Date: Sat, 24 May 1997 23:06:35 +0300 (EEST) From: Narvi <narvi@haldjas.folklore.ee> To: Don Yuniskis <dgy@rtd.com> Cc: freebsd-hackers@freefall.FreeBSD.org Subject: Re: diskless hardware *design* suggestions Message-ID: <Pine.BSF.3.96.970524224929.12516A-100000@haldjas.folklore.ee> In-Reply-To: <199705241946.MAA03270@seagull.rtd.com>
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On Sat, 24 May 1997, Don Yuniskis wrote: > > > I'm hacking together an SC400 (486/66 PC on a chip) based design > > > and would like that design to serve double duty as the core of an > > > FBSD-based diskless system (e.g., a small X-terminal). > > > > Hey, you get to write the BIOS! :-) Unless, of course you opt to use one > > distributed by AMD with the evaluation board. > > It was my understanding that FBSD doesn't *use* any of the BIOS hooks > (aside from grabbing the initial boot loader off the disk, etc. -- in > my case, it would be similar to grabbing an initial packet off the network) > > > > Unfortunately, none of the x86 MCU's are particularly > > > tolerant of external bus masters. And, sharing memory tends to > > > clutter these designs quickly. So, DMA is the only *painless* > > > way to interface to the core. > > > As such, are there any good suggestions for NIC's that would > > > fit well in this architecture? Preferably fast ethernet? Very > > > high integration is desirable to keep the size of the box down to > > > a minimum (i.e. PC/104 form factor). > > > > I am not sure if Fast ethernet is very usable with a 486/66 and no bus > > mastering. > > (sigh) I am *so* tired of folks claiming that XYZ won't work with > fast ethernet! That was the excuse given for the lack of ISA boards, > etc. It, of course, depends on your network utilization (i.e. > 100 ISA machines can easily use all the bandwidth of a 100bit > ethernet and *still* never drop a packet -- assuming they each > have very little traffic!) Sorry :-( I did not mean to say that ISA (and SC400 can support VESA VL) will not be enough for 100BaseT. The maximum bandwidth supported by many 100BaseTX hubs is actually around 80 (just read the docs :-(), which is not too much higher than the theoretical bus-master bandwidth of ISA. > > I suspect that a DMA channel of the SC400 could move enough bits. > The problem would lie in the number of bcopy()'s, etc. needed to > actually move the data to someplace useful... > > > But take a look at the SMC FEAST controller (91C100), it has > > 32/16 bit bus support and is not meant specificly for PCI (actually, VL is > > even mentioned). > > Yes, but the SC400 devices don't support *any* busmastering! > So, that type of solution would necessitate the additon of > a psuedo-dual-ported RAM just for the NIC. Kinda silly when > there are gobs of DRAM sitting on the DRAM controller yet > inaccessible to the NIC... Well, I am not sure if the FEAST chip even supports bus-mastering. It does have support for 128K of external buffer RAM. > > > For 10 Mbit ethernet SMC also makes single-chip thingies > > with direct ISA interface (91c94 - 91c96). They have 4.5KB RAM > > on-board (dynamically allocated, in which upto 18 packets may be stored > > at a time). There even seems to be enough information for writing a > > driver. > > This is currently my best guess at a solution. However, I would > have liked a faster device and I'm unsure of the overhead of > moving bytes to/from it. It says on the DS it doesn't use any wait states on ISA, then again, it seems to be a 16 bit wide IO device only (no memory mapping). Sander > > Thx! > --don >
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