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Date:      Sat, 11 Feb 2012 20:49:30 -0800
From:      Adrian Chadd <adrian@freebsd.org>
To:        Warner Losh <imp@bsdimp.com>
Cc:        Aleksandr Rybalko <ray@ddteam.net>, Stefan Bethke <stb@lassitu.de>, Juli Mallett <jmallett@freebsd.org>, FreeBSD-arch <freebsd-arch@freebsd.org>, Aleksandr Rybalko <ray@freebsd.org>, Marius Strobl <marius@alchemy.franken.de>
Subject:   Re: Extending sys/dev/mii
Message-ID:  <CAJ-Vmon=cPivcJjb_dvuMzsok2Qp-MeNLK0uNo5g8O2ekEaOMA@mail.gmail.com>
In-Reply-To: <B1700D0A-240D-4274-AA3F-FCA798AD2F14@bsdimp.com>
References:  <95372FB3-406F-46C2-8684-4FDB672D9FCF@lassitu.de> <20120106214741.GB88161@alchemy.franken.de> <F60B2B70-049F-4497-BBA8-3C421088C1EA@lassitu.de> <20120108130039.GG88161@alchemy.franken.de> <23477898-8D85-498C-8E30-192810BD68A8@lassitu.de> <20120111193738.GB44286@alchemy.franken.de> <66DDA0A2-F878-43FF-8824-54868F493B18@lassitu.de> <20120125221753.GA17821@alchemy.franken.de> <AF2CF7A4-27B8-4181-96F5-7998B126CD1C@lassitu.de> <CAJ-VmomcgC6V-sY7jN%2Bh6T7uPfVesPBV%2BKPu2TVD4YDKrdk4LQ@mail.gmail.com> <20120211111731.GE39861@alchemy.franken.de> <20120211144544.c91701d9.ray@ddteam.net> <CAJ-Vmo=CLMcO%2BR21TVKC3zVGS4rHO2Ca31D9ts2kNwpnhAtOvQ@mail.gmail.com> <B1700D0A-240D-4274-AA3F-FCA798AD2F14@bsdimp.com>

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On 11 February 2012 17:15, Warner Losh <imp@bsdimp.com> wrote:
>
> On Feb 11, 2012, at 6:00 PM, Adrian Chadd wrote:
>> I'd like to try and finally bring some sanity to the hardcoded PHY
>> mask handling in if_arge (and make it actually work for AR71xx and
>> AR724x - where AR71xx has one shared MDIO bus between both MACs, but
>> AR724x has two independent MDIO busses..)
>
> FDT would do that...

.. how would it bring sanity to the device driver?

Right now the driver assumes that both arge0 and arge1 mdiobus are the
same and uses the phymask setting to determine how/when to access
registers (ie, trying to read/write from phy registers not in the
phymask of argeX are denied.) It is one of the annoying issues with
the AR7241 internal switch support as that switch hangs off of arge1's
MII bus.

It may make it easier to specify the configuration but it doesn't fix
the fundamentally wrong assumption.

The trouble in this whole mess (where FDT may help) is that phy's for
arge0 may actually sit on arge1. So you can't probe/attach the miibus
on arge0 until you've probe/attached arge1, so the arge1 MII registers
can be tickled.

Ray/Stefan/others: if anything, I'd like to try and bring sanity to
this particular thorny issue in -HEAD before we worry about switch PHY
devices.



Adrian



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