Date: Thu, 7 Sep 2017 21:33:28 +0000 (UTC) From: Conrad Meyer <cem@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323289 - head/sys/x86/x86 Message-ID: <201709072133.v87LXSLS056238@repo.freebsd.org>
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Author: cem Date: Thu Sep 7 21:33:27 2017 New Revision: 323289 URL: https://svnweb.freebsd.org/changeset/base/323289 Log: x86 MCA: Helpfully, print why ECC thresholding is not enabled on AMD Sponsored by: Dell EMC Isilon Modified: head/sys/x86/x86/mca.c Modified: head/sys/x86/x86/mca.c ============================================================================== --- head/sys/x86/x86/mca.c Thu Sep 7 21:31:07 2017 (r323288) +++ head/sys/x86/x86/mca.c Thu Sep 7 21:33:27 2017 (r323289) @@ -981,19 +981,25 @@ amd_thresholding_init(void) /* The counter must be valid and present. */ misc = rdmsr(MSR_MC_MISC(MC_AMDNB_BANK)); if ((misc & (MC_MISC_AMDNB_VAL | MC_MISC_AMDNB_CNTP)) != - (MC_MISC_AMDNB_VAL | MC_MISC_AMDNB_CNTP)) + (MC_MISC_AMDNB_VAL | MC_MISC_AMDNB_CNTP)) { + printf("%s: 0x%lx: !valid | !present\n", __func__, misc); return; + } /* The register should not be locked. */ - if ((misc & MC_MISC_AMDNB_LOCK) != 0) + if ((misc & MC_MISC_AMDNB_LOCK) != 0) { + printf("%s: 0x%lx: locked\n", __func__, misc); return; + } /* * If counter is enabled then either the firmware or another CPU * has already claimed it. */ - if ((misc & MC_MISC_AMDNB_CNTEN) != 0) + if ((misc & MC_MISC_AMDNB_CNTEN) != 0) { + printf("%s: 0x%lx: count already enabled\n", __func__, misc); return; + } /* * Configure an Extended Interrupt LVT register for reporting @@ -1001,10 +1007,15 @@ amd_thresholding_init(void) * extended register is available. */ amd_elvt = lapic_enable_mca_elvt(); - if (amd_elvt < 0) + if (amd_elvt < 0) { + printf("%s: lapic enable mca elvt failed: %d\n", __func__, amd_elvt); return; + } /* Re-use Intel CMC support infrastructure. */ + if (bootverbose) + printf("%s: Starting AMD thresholding\n", __func__); + cc = &amd_et_state[PCPU_GET(cpuid)]; cc->cur_threshold = 1; amd_thresholding_start(cc);
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