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Date:      Wed, 15 Nov 2017 02:24:47 +0000 (UTC)
From:      Warner Losh <imp@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r325838 - in head/sys/dev: nvme pci
Message-ID:  <201711150224.vAF2Ole2088186@repo.freebsd.org>
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Author: imp
Date: Wed Nov 15 02:24:47 2017
New Revision: 325838
URL: https://svnweb.freebsd.org/changeset/base/325838

Log:
  Inline pcie_link_{status,caps} where needed. Remove them as they
  aren't really needed and I don't want to document them.
  
  Suggested by: jhb@
  Sponsored by: Netflix

Modified:
  head/sys/dev/nvme/nvme_sim.c
  head/sys/dev/pci/pci.c
  head/sys/dev/pci/pcivar.h

Modified: head/sys/dev/nvme/nvme_sim.c
==============================================================================
--- head/sys/dev/nvme/nvme_sim.c	Wed Nov 15 02:03:38 2017	(r325837)
+++ head/sys/dev/nvme/nvme_sim.c	Wed Nov 15 02:24:47 2017	(r325838)
@@ -129,9 +129,11 @@ static uint32_t
 nvme_link_kBps(struct nvme_controller *ctrlr)
 {
 	uint32_t speed, lanes, link[] = { 1, 250000, 500000, 985000, 1970000 };
+	uint32_t status;
 
-	speed = pcie_link_status(ctrlr->dev) & PCIEM_LINK_STA_SPEED;
-	lanes = (pcie_link_status(ctrlr->dev) & PCIEM_LINK_STA_WIDTH) >> 4;
+	status = pcie_read_config(ctrlr->dev, PCIER_LINK_STA, 2);
+	speed = status & PCIEM_LINK_STA_SPEED;
+	lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
 	/*
 	 * Failsafe on link speed indicator. If it is insane report the number of
 	 * lanes as the speed. Not 100% accurate, but may be diagnostic.
@@ -217,18 +219,21 @@ nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
 		struct ccb_trans_settings_nvme	*nvmep;
 		struct ccb_trans_settings_nvme	*nvmex;
 		device_t dev;
+		uint32_t status, caps;
 
 		dev = ctrlr->dev;
 		cts = &ccb->cts;
 		nvmex = &cts->xport_specific.nvme;
 		nvmep = &cts->proto_specific.nvme;
 
+		status = pcie_read_config(dev, PCIER_LINK_STA, 2);
+		caps = pcie_read_config(dev, PCIER_LINK_CAP, 2);
 		nvmex->valid = CTS_NVME_VALID_SPEC | CTS_NVME_VALID_LINK;
 		nvmex->spec = nvme_mmio_read_4(ctrlr, vs);
-		nvmex->speed = pcie_link_status(dev) & PCIEM_LINK_STA_SPEED;
-		nvmex->lanes = (pcie_link_status(dev) & PCIEM_LINK_STA_WIDTH) >> 4;
-		nvmex->max_speed = pcie_link_caps(dev) & PCIEM_LINK_CAP_MAX_SPEED;
-		nvmex->max_lanes = (pcie_link_caps(dev) & PCIEM_LINK_CAP_MAX_WIDTH) >> 4;
+		nvmex->speed = status & PCIEM_LINK_STA_SPEED;
+		nvmex->lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
+		nvmex->max_speed = caps & PCIEM_LINK_CAP_MAX_SPEED;
+		nvmex->max_lanes = (caps & PCIEM_LINK_CAP_MAX_WIDTH) >> 4;
 
 		/* XXX these should be something else maybe ? */
 		nvmep->valid = 1;

Modified: head/sys/dev/pci/pci.c
==============================================================================
--- head/sys/dev/pci/pci.c	Wed Nov 15 02:03:38 2017	(r325837)
+++ head/sys/dev/pci/pci.c	Wed Nov 15 02:24:47 2017	(r325838)
@@ -6115,31 +6115,3 @@ pcie_flr(device_t dev, u_int max_delay, bool force)
 		pci_printf(&dinfo->cfg, "Transactions pending after FLR!\n");
 	return (true);
 }
-
-uint16_t
-pcie_link_status(device_t dev)
-{
-	struct pci_devinfo *dinfo;
-	struct pcicfg_pcie *cfg;
-	int pos;
-
-	dinfo = device_get_ivars(dev);
-	cfg = &dinfo->cfg.pcie;
-	pos = cfg->pcie_location;
-
-	return pci_read_config(dev, pos + PCIER_LINK_STA, 2);
-}
-
-uint16_t
-pcie_link_caps(device_t dev)
-{
-	struct pci_devinfo *dinfo;
-	struct pcicfg_pcie *cfg;
-	int pos;
-
-	dinfo = device_get_ivars(dev);
-	cfg = &dinfo->cfg.pcie;
-	pos = cfg->pcie_location;
-
-	return pci_read_config(dev, pos + PCIER_LINK_CAP, 2);
-}

Modified: head/sys/dev/pci/pcivar.h
==============================================================================
--- head/sys/dev/pci/pcivar.h	Wed Nov 15 02:03:38 2017	(r325837)
+++ head/sys/dev/pci/pcivar.h	Wed Nov 15 02:24:47 2017	(r325838)
@@ -598,8 +598,6 @@ uint32_t pcie_adjust_config(device_t dev, int reg, uin
 bool	pcie_flr(device_t dev, u_int max_delay, bool force);
 int	pcie_get_max_completion_timeout(device_t dev);
 bool	pcie_wait_for_pending_transactions(device_t dev, u_int max_delay);
-uint16_t pcie_link_status(device_t dev);
-uint16_t pcie_link_caps(device_t dev);
 
 #ifdef BUS_SPACE_MAXADDR
 #if (BUS_SPACE_MAXADDR > 0xFFFFFFFF)

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