Date: Mon, 2 Mar 2015 01:23:59 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279509 - head/sys/mips/atheros Message-ID: <201503020123.t221NxI4000282@svn.freebsd.org>
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Author: adrian Date: Mon Mar 2 01:23:59 2015 New Revision: 279509 URL: https://svnweb.freebsd.org/changeset/base/279509 Log: Add a MII mode for SGMII. This appears on the AR934x and later chips, although it's not something that's programmed via the arge0/arge1 register space. It's just cosmetic. Modified: head/sys/mips/atheros/ar71xxreg.h Modified: head/sys/mips/atheros/ar71xxreg.h ============================================================================== --- head/sys/mips/atheros/ar71xxreg.h Sun Mar 1 22:32:23 2015 (r279508) +++ head/sys/mips/atheros/ar71xxreg.h Mon Mar 2 01:23:59 2015 (r279509) @@ -273,6 +273,7 @@ typedef enum { AR71XX_MII_MODE_MII, AR71XX_MII_MODE_RGMII, AR71XX_MII_MODE_RMII, + AR71XX_MII_MODE_SGMII /* not hardware defined, though! */ } ar71xx_mii_mode; /*
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