Date: Tue, 23 Jun 2020 15:32:05 +0000 (UTC) From: Ed Maste <emaste@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r362542 - head/sys/arm64/include Message-ID: <202006231532.05NFW55r016471@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: emaste Date: Tue Jun 23 15:32:05 2020 New Revision: 362542 URL: https://svnweb.freebsd.org/changeset/base/362542 Log: arm64 armreg.h: fix TCR_TBI1 definition Submitted by: Greg V <greg@unrelenting.technology> Differential Revision: https://reviews.freebsd.org/D25411 Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h ============================================================================== --- head/sys/arm64/include/armreg.h Tue Jun 23 15:14:54 2020 (r362541) +++ head/sys/arm64/include/armreg.h Tue Jun 23 15:32:05 2020 (r362542) @@ -782,7 +782,7 @@ #define TCR_HA_SHIFT 39 #define TCR_HA (1UL << TCR_HA_SHIFT) #define TCR_TBI1_SHIFT 38 -#define TCR_TBI1 (1UL << TCR_TBI1_SHIFT +#define TCR_TBI1 (1UL << TCR_TBI1_SHIFT) #define TCR_TBI0_SHIFT 37 #define TCR_TBI0 (1U << TCR_TBI0_SHIFT) #define TCR_ASID_SHIFT 36
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?202006231532.05NFW55r016471>
