Date: Mon, 12 May 2008 18:23:28 +0100 From: RW <fbsd06@mlists.homeunix.com> To: freebsd-hackers@freebsd.org Subject: Re: i386 cpu_reset_real: code/comment mismatch Message-ID: <20080512182328.09a8a173@gumby.homeunix.com.> In-Reply-To: <4828557B.9000506@icyb.net.ua> References: <4828557B.9000506@icyb.net.ua>
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On Mon, 12 May 2008 17:34:35 +0300 Andriy Gapon <avg@icyb.net.ua> wrote: > > This is not a real issue, just a code clarification. > > First a snippet from sys/i386/i386/vm_machdep.c, cpu_reset_real() > /* > * Attempt to force a reset via the Reset Control register at > * I/O port 0xcf9. Bit 2 forces a system reset when it is > * written as 1. Bit 1 selects the type of reset to attempt: > * 0 selects a "soft" reset, and 1 selects a "hard" reset. We > * try to do a "soft" reset first, and then a "hard" reset. > */ > outb(0xcf9, 0x2); > outb(0xcf9, 0x6); > > I think that the comment is correct up to but not including the last > sentence. Writing 0x2 sets bit 1 to 1 (thus selecting hard reset), and > writing 0x6 sets both bits 2 and 1 to 1 (thus performing hard reset). > So we always just do a hard reset, no trying of soft reset (would it > even make sense to do the last line of the comment says). > It looks to me as if the comment was added retrospectively by someone who got the two bits mixed-up when reading the source. If bits 1 and 2 were the other way around, it would be code for a soft-reset followed by a hard-reset.
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