Date: Thu, 2 Mar 2006 09:18:49 +0200 From: Ruslan Ermilov <ru@FreeBSD.org> To: Scott Long <scottl@samsco.org> Cc: cvs-src@FreeBSD.org, John-Mark Gurney <gurney_j@resnet.uoregon.edu>, src-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/share/man/man9 bus_dma.9 Message-ID: <20060302071849.GH29183@ip.net.ua> In-Reply-To: <4406334F.7070205@samsco.org> References: <200602281958.k1SJwvGL051504@repoman.freebsd.org> <20060301232621.GF29183@ip.net.ua> <20060301233327.GQ840@funkthat.com> <4406334F.7070205@samsco.org>
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On Wed, Mar 01, 2006 at 04:50:39PM -0700, Scott Long wrote:
> John-Mark Gurney wrote:
> >Ruslan Ermilov wrote this message on Thu, Mar 02, 2006 at 01:26 +0200:
> >
> >>On Tue, Feb 28, 2006 at 07:58:57PM +0000, John-Mark Gurney wrote:
> >>
> >>>jmg 2006-02-28 19:58:57 UTC
> >>>
> >>> FreeBSD src repository
> >>>
> >>> Modified files:
> >>> share/man/man9 bus_dma.9=20
> >>> Log:
> >>> update examples to use the correct terms that was never updated when =
the
> >>> earlier descriptions were gone over...
> >>>=20
> >>> MFC after: 3 days
> >>>=20
> >>> Revision Changes Path
> >>> 1.32 +3 -3 src/share/man/man9/bus_dma.9
> >>>
> >>
> >>Not enough of fixing: "DMA read" and "DMA write" are also entangled her=
e.
> >
> >
> >Nope... WRITE =3D=3D DMA read... Read the descriptions of the flags
> >very carefully... If you aren't confused, you don't understand it..
> >The reason you're confused is the reason why everyone gets it wrong,
> >and no one ever gets it correct the first time trying to figure out
> >which one to use...
> >
>=20
WRITE =3D=3D DMA write, it's not THAT confusing, please see below. :-)
> Think of it from the perspective of the driver doing an operation. If=20
> the driver is reading a block off the disk, then you want to use the
^^^^^^^
> PREREAD/POSTREAD operations.
^^^^^^^^^^^^^^^^
>=20
Correct. So driver tells a device to "read directly into memory", a
DMA read operation. Similarly for writes. A CPU "writes directly
into device memory", a DMA write operation.
> Likewise for writes. It is done this way
> for clarity in the driver. I can't imagine how many bugs we'd have if
> write =3D=3D read in the driver sources.
>=20
Yes, that fits my understanding of how things work, and that's what
we have clarified in the manpage not so long ago:
: All operations specified below are performed from the host mem-
: ory point of view, where a read implies data coming from the
^^^^ ^^^^^^^^
: device to the host memory, and a write implies data going from
^^^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^ ^^^^
: the host memory to the device. Alternately, the operations can
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
: be thought of in terms of driver operations, where reading a
: network packet or storage sector corresponds to a read operation
: in bus_dma.
:=20
: BUS_DMASYNC_PREREAD Perform any synchronization required
: prior to an update of host memory by the
: DMA read operation.
:=20
: BUS_DMASYNC_PREWRITE Perform any synchronization required
: after an update of host memory by the CPU
: and prior to DMA write operations.
:=20
: BUS_DMASYNC_POSTREAD Perform any synchronization required
: after DMA read operations and prior to
: CPU access to host memory.
:=20
: BUS_DMASYNC_POSTWRITE Perform any synchronization required
: after DMA write operations.
However, the text that John-Mark has correctly changed now looks
like this:
: bus_dmamap_sync() is the method used to ensure that CPU and
: device DMA access to shared memory is coherent. For example,
: the CPU might be used to setup the contents of a buffer that is
: to be DMA'ed into a device.
That's DMA write.
: To ensure that the data are visible
: via the device's mapping of that memory, the buffer must be
: loaded and a dma sync operation of BUS_DMASYNC_PREWRITE must be
^^^^^^^^^^^^^^^^^^^^ OK!
: performed. Additional sync operations must be performed after
: every CPU write to this memory if additional DMA reads are to be
^^^^^^^^^ should be "write"
: performed. Conversely, for the DMA write case, the buffer must
^^^^^ should be "read"
: be loaded, and a dma sync operation of BUS_DMASYNC_PREREAD must
^^^^^^^^^^^^^^^^^^^ OK!
: be performed. The CPU will only be able to see the results of
: this DMA write once the DMA has completed and a
^^^^^ should be "read"
: BUS_DMASYNC_POSTREAD operation has been performed.
^^^^^^^^^^^^^^^^^^^^ OK!
Cheers,
--=20
Ruslan Ermilov
ru@FreeBSD.org
FreeBSD committer
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