Date: Sat, 18 Apr 2009 12:55:55 -0500 (CDT) From: Mark Tinguely <tinguely@casselton.net> To: chuckr@telenix.org, imp@bsdimp.com Cc: gballet@gmail.com, freebsd-arm@freebsd.org, tinguely@casselton.net, ticso@cicely.de Subject: Re: Pandora Message-ID: <200904181755.n3IHttoF093174@casselton.net> In-Reply-To: <49EA0397.3020105@telenix.org>
index | next in thread | previous in thread | raw e-mail
He is not in error talking about previous versions of the ARM. The newer version of ARM are extensions of previous versions. The basic instruction set is the same, but newer versions have newer features. For example, the ARMv7 has a new security mode - for virtual machine monitor? The ARMv6 introduced new caches and ldrex/strex instructions. The Xscale and some of the ARMv5 have a new memory pagetable layout. Some ARMs have superpages, bits for caching/buffering. In each version, there are chips that have different coprocessors: vector processors, java processor, some do thumb instructions, etc. Not every feature is currently supported in FreeBSD. Every ARM board is unique. The BeagleBoard, new Gumstix and the Pandora use the same processor and many things will be simular, but there will be difference too. They will have different devices that may require stub code, and the interrupts could be wired differently. FreeBSD has files for each ARM version, ARM7, ARM9, Xscale, ARM10 (ARMv6), ARM11 (ARMv7) that defines how that chip flushes the cache, changes memory space, etc. For example: sys/arm/arm/cpufunc_asm_arm11.S. A person should start with the existing FreeBSD code when porting to a new board, processor type and extend for that board. I have some ideas in code form for the newer memory models that we need to test in silicon - the emulators don't really implement the memory models. --Mark.help
Want to link to this message? Use this
URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200904181755.n3IHttoF093174>
