Date: Mon, 5 Nov 2012 11:26:09 -0700 From: Warner Losh <imp@bsdimp.com> To: Eitan Adler <lists@eitanadler.com> Cc: "Rodney W. Grimes" <freebsd@pdx.rh.cn85.chatusa.com>, Juli Mallett <juli@clockworksquid.com>, "freebsd-mips@FreeBSD.org" <freebsd-mips@freebsd.org> Subject: Re: CACHE_LINE_SIZE macro. Message-ID: <BDF32C8A-92E4-4B66-A59B-E7B5D99C286E@bsdimp.com> In-Reply-To: <CAF6rxgnMwiAr4FSaHF0sEGFCJ7Lh-Su5n3x2jNriNb-YPFrvjA@mail.gmail.com> References: <CACVs6=_BrwJ19CPj7OqKvV8boHfujVWqn96u3VPUmZ040JpAeQ@mail.gmail.com> <201211041828.qA4ISomC076058@pdx.rh.CN85.ChatUSA.com> <CAF6rxgn-bNJOuvdiRj_UUGQUTRaeOt54OdzHOioNz5f566hoig@mail.gmail.com> <DAE462F0-9D85-4942-8826-C0709E36D3B7@bsdimp.com> <CAF6rxg=Et1d6u4RBCB88KibW_uiaRbNdb75v0TQOr-0BrEXV=g@mail.gmail.com> <B4225C25-BD43-423C-A1A2-C9FD4AC92ECB@bsdimp.com> <1352137087.1120.180.camel@revolution.hippie.lan> <E68E4C16-64E5-460E-B13C-164FDA89436C@bsdimp.com> <1352138944.1120.187.camel@revolution.hippie.lan> <CAF6rxgnMwiAr4FSaHF0sEGFCJ7Lh-Su5n3x2jNriNb-YPFrvjA@mail.gmail.com>
next in thread | previous in thread | raw e-mail | index | archive | help
On Nov 5, 2012, at 11:12 AM, Eitan Adler wrote: > On 5 November 2012 13:09, Ian Lepore <freebsd@damnhippie.dyndns.org> = wrote: >> The other thing that bugs me is that cache is a scarce resource on = our >> wimpy little platforms, and padding just ensures that we use it even >> less effectively in the UP case. It seems like it's more likely to = kill >> performance than improve it, because one would expect that when a = lock >> is embedded in a structure, there's going to be access to other data >> nearby once the lock is acquired. >=20 > This is another reason to encourage the separation between the real > cache line size and the lock padding version. On low cache-size > environments the latter could be tuned to not matter. Yea, we definitely need to separate out the difference between 'padding = for performance' which CACHE_LINE_SIZE does (and perhaps we need several = flavors), padding for correctness (which is needed for DMA correctness = wrt non-coherent cache architectures) and padding because padding always = helps, right? Warner
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?BDF32C8A-92E4-4B66-A59B-E7B5D99C286E>