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Date:      Tue, 27 Nov 2018 13:00:39 +0000 (UTC)
From:      Andrew Rybchenko <arybchik@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r341051 - in head/sys/dev/sfxge: . common
Message-ID:  <201811271300.wARD0dv5020511@repo.freebsd.org>
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Author: arybchik
Date: Tue Nov 27 13:00:39 2018
New Revision: 341051
URL: https://svnweb.freebsd.org/changeset/base/341051

Log:
  sfxge(4): add efsys macro to get memory region size
  
  EFSYS_MEM_SIZE() reports the DMA mapped size of an efsys_mem_t
  allocated region (the allocation size may be different due to
  memory allocator and DMA alignment restrictions).
  
  This ensures that common code internals have explicit knowledge
  of the usable size of DMA mapped memory regions.
  
  Submitted by:   Andy Moreton <amoreton at solarflare.com>
  Sponsored by:   Solarflare Communications, Inc.
  Differential Revision:  https://reviews.freebsd.org/D18170

Modified:
  head/sys/dev/sfxge/common/ef10_rx.c
  head/sys/dev/sfxge/common/ef10_tx.c
  head/sys/dev/sfxge/common/efsys.h
  head/sys/dev/sfxge/common/efx_intr.c
  head/sys/dev/sfxge/common/efx_mcdi.c
  head/sys/dev/sfxge/common/siena_phy.c
  head/sys/dev/sfxge/sfxge_dma.c

Modified: head/sys/dev/sfxge/common/ef10_rx.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_rx.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/ef10_rx.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -64,6 +64,11 @@ efx_mcdi_init_rxq(
 
 	EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
 
+	if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_RXQ_SIZE(ndescs))) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	if (ps_bufsize > 0)
 		dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
 	else
@@ -130,11 +135,13 @@ efx_mcdi_init_rxq(
 
 	if (req.emr_rc != 0) {
 		rc = req.emr_rc;
-		goto fail1;
+		goto fail2;
 	}
 
 	return (0);
 
+fail2:
+	EFSYS_PROBE(fail2);
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 

Modified: head/sys/dev/sfxge/common/ef10_tx.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_tx.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/ef10_tx.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -69,10 +69,15 @@ efx_mcdi_init_txq(
 	EFSYS_ASSERT(EFX_TXQ_MAX_BUFS >=
 	    EFX_TXQ_NBUFS(enp->en_nic_cfg.enc_txq_max_ndescs));
 
+	if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_TXQ_SIZE(ndescs))) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	npages = EFX_TXQ_NBUFS(ndescs);
 	if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
 		rc = EINVAL;
-		goto fail1;
+		goto fail2;
 	}
 
 	(void) memset(payload, 0, sizeof (payload));
@@ -121,11 +126,13 @@ efx_mcdi_init_txq(
 
 	if (req.emr_rc != 0) {
 		rc = req.emr_rc;
-		goto fail2;
+		goto fail3;
 	}
 
 	return (0);
 
+fail3:
+	EFSYS_PROBE(fail3);
 fail2:
 	EFSYS_PROBE(fail2);
 fail1:

Modified: head/sys/dev/sfxge/common/efsys.h
==============================================================================
--- head/sys/dev/sfxge/common/efsys.h	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/efsys.h	Tue Nov 27 13:00:39 2018	(r341051)
@@ -392,9 +392,19 @@ typedef struct efsys_mem_s {
 	bus_dmamap_t		esm_map;
 	caddr_t			esm_base;
 	efsys_dma_addr_t	esm_addr;
+	size_t			esm_size;
 } efsys_mem_t;
 
+#define	EFSYS_MEM_SIZE(_esmp)						\
+	((_esmp)->esm_size)
 
+#define	EFSYS_MEM_ADDR(_esmp)						\
+	((_esmp)->esm_addr)
+
+#define	EFSYS_MEM_IS_NULL(_esmp)					\
+	((_esmp)->esm_base == NULL)
+
+
 #define	EFSYS_MEM_ZERO(_esmp, _size)					\
 	do {								\
 		(void) memset((_esmp)->esm_base, 0, (_size));		\
@@ -616,12 +626,6 @@ typedef struct efsys_mem_s {
 	_NOTE(CONSTANTCONDITION)					\
 	} while (B_FALSE)
 #endif
-
-#define	EFSYS_MEM_ADDR(_esmp)						\
-	((_esmp)->esm_addr)
-
-#define	EFSYS_MEM_IS_NULL(_esmp)					\
-	((_esmp)->esm_base == NULL)
 
 /* BAR */
 

Modified: head/sys/dev/sfxge/common/efx_intr.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_intr.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/efx_intr.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -318,7 +318,13 @@ siena_intr_init(
 {
 	efx_intr_t *eip = &(enp->en_intr);
 	efx_oword_t oword;
+	efx_rc_t rc;
 
+	if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_INTR_SIZE)) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	/*
 	 * bug17213 workaround.
 	 *
@@ -349,6 +355,11 @@ siena_intr_init(
 	EFX_BAR_WRITEO(enp, FR_AZ_INT_ADR_REG_KER, &oword);
 
 	return (0);
+
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
 }
 
 static			void

Modified: head/sys/dev/sfxge/common/efx_mcdi.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_mcdi.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/efx_mcdi.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -1844,10 +1844,12 @@ efx_mcdi_mac_stats(
 	    MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
 
 	if (esmp != NULL) {
-		int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
+		uint32_t bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
 
 		EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
 		    EFX_MAC_STATS_SIZE);
+
+		EFSYS_ASSERT3U(bytes, <=, (uint32_t)EFSYS_MEM_SIZE(esmp));
 
 		MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
 			    EFSYS_MEM_ADDR(esmp) & 0xffffffff);

Modified: head/sys/dev/sfxge/common/siena_phy.c
==============================================================================
--- head/sys/dev/sfxge/common/siena_phy.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/common/siena_phy.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -563,6 +563,11 @@ siena_phy_stats_update(
 			    MC_CMD_PHY_STATS_OUT_DMA_LEN)];
 	efx_rc_t rc;
 
+	if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_PHY_STATS_SIZE)) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	(void) memset(payload, 0, sizeof (payload));
 	req.emr_cmd = MC_CMD_PHY_STATS;
 	req.emr_in_buf = payload;
@@ -579,7 +584,7 @@ siena_phy_stats_update(
 
 	if (req.emr_rc != 0) {
 		rc = req.emr_rc;
-		goto fail1;
+		goto fail2;
 	}
 	EFSYS_ASSERT3U(req.emr_out_length, ==, MC_CMD_PHY_STATS_OUT_DMA_LEN);
 
@@ -588,6 +593,8 @@ siena_phy_stats_update(
 
 	return (0);
 
+fail2:
+	EFSYS_PROBE(fail2);
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 

Modified: head/sys/dev/sfxge/sfxge_dma.c
==============================================================================
--- head/sys/dev/sfxge/sfxge_dma.c	Tue Nov 27 13:00:28 2018	(r341050)
+++ head/sys/dev/sfxge/sfxge_dma.c	Tue Nov 27 13:00:39 2018	(r341051)
@@ -136,6 +136,7 @@ sfxge_dma_free(efsys_mem_t *esmp)
 
 	esmp->esm_addr = 0;
 	esmp->esm_base = NULL;
+	esmp->esm_size = 0;
 }
 
 int
@@ -175,6 +176,7 @@ sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len
 		goto fail_load_check;
 
 	esmp->esm_base = vaddr;
+	esmp->esm_size = len;
 
 	return (0);

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