Date: Fri, 08 Sep 2023 09:36:24 +0000 From: bugzilla-noreply@freebsd.org To: freebsd-arm@FreeBSD.org Subject: [Bug 273634] allwinner clk_ng fake divisors/multipliers Message-ID: <bug-273634-7@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D273634 Bug ID: 273634 Summary: allwinner clk_ng fake divisors/multipliers Product: Base System Version: Unspecified Hardware: arm64 OS: Any Status: New Severity: Affects Only Me Priority: --- Component: arm Assignee: freebsd-arm@FreeBSD.org Reporter: titus@edc.ro when you declare a NMM (or other type) clock with a fake divisor/multiplier and AW_CLK_FACTOR_FIXED flag even if the number of bits/width for the clock= is 0 the value is still set to the register (at the declared shift position) because the value returned by aw_clk_factor_get_value for AW_CLK_FACTOR_FIX= ED is not masked when setting the clock frequency this is causing undesired results the fix would be that aw_clk_factor_get_value to mask the value for=20 AW_CLK_FACTOR_FIXED NM_CLK(spdif_clk, CLK_SPDIF, "spdif", spdif_parents, /* id, name, parents */ 0xC0, /* offset */ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake); */ 0, 4, 0, 0, /* m factor */ 0, 0, /* mux */ 31, /* gate */ AW_CLK_HAS_GATE); /* flags */ bit 0 will be forced to 1 by the n factor and will alter the m factor --=20 You are receiving this mail because: You are the assignee for the bug.=
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