Date: Thu, 16 May 2019 15:42:00 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r347712 - stable/12/sys/dev/mlx5/mlx5_core Message-ID: <201905161542.x4GFg09Q043352@repo.freebsd.org>
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Author: hselasky Date: Thu May 16 15:42:00 2019 New Revision: 347712 URL: https://svnweb.freebsd.org/changeset/base/347712 Log: MFC r347248: Enable FPGA and FPGA QP errors for EQ and call the handler in mlx5core. Submitted by: kib@ Sponsored by: Mellanox Technologies Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Thu May 16 15:41:04 2019 (r347711) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_eq.c Thu May 16 15:42:00 2019 (r347712) @@ -29,6 +29,7 @@ #include <linux/module.h> #include <dev/mlx5/port.h> #include <dev/mlx5/mlx5_ifc.h> +#include <dev/mlx5/mlx5_fpga/core.h> #include "mlx5_core.h" #include "opt_rss.h" @@ -153,6 +154,10 @@ static const char *eqe_type_str(u8 type) return "MLX5_EVENT_TYPE_PAGE_REQUEST"; case MLX5_EVENT_TYPE_NIC_VPORT_CHANGE: return "MLX5_EVENT_TYPE_NIC_VPORT_CHANGE"; + case MLX5_EVENT_TYPE_FPGA_ERROR: + return "MLX5_EVENT_TYPE_FPGA_ERROR"; + case MLX5_EVENT_TYPE_FPGA_QP_ERROR: + return "MLX5_EVENT_TYPE_FPGA_QP_ERROR"; case MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT: return "MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT"; case MLX5_EVENT_TYPE_CODING_GENERAL_NOTIFICATION_EVENT: @@ -338,6 +343,11 @@ static int mlx5_eq_int(struct mlx5_core_dev *dev, stru } break; + case MLX5_EVENT_TYPE_FPGA_ERROR: + case MLX5_EVENT_TYPE_FPGA_QP_ERROR: + mlx5_fpga_event(dev, eqe->type, &eqe->data.raw); + break; + default: mlx5_core_warn(dev, "Unhandled event 0x%x on EQ 0x%x\n", eqe->type, eq->eqn); @@ -526,6 +536,10 @@ int mlx5_start_eqs(struct mlx5_core_dev *dev) if (MLX5_CAP_GEN(dev, dcbx)) async_event_mask |= (1ull << MLX5_EVENT_TYPE_CODING_DCBX_CHANGE_EVENT); + + if (MLX5_CAP_GEN(dev, fpga)) + async_event_mask |= (1ull << MLX5_EVENT_TYPE_FPGA_ERROR) | + (1ull << MLX5_EVENT_TYPE_FPGA_QP_ERROR); err = mlx5_create_map_eq(dev, &table->cmd_eq, MLX5_EQ_VEC_CMD, MLX5_NUM_CMD_EQE, 1ull << MLX5_EVENT_TYPE_CMD,
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