Date: Wed, 6 Oct 2010 22:25:21 +0000 (UTC) From: Olivier Houchard <cognet@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r213496 - head/sys/arm/at91 Message-ID: <201010062225.o96MPLrW019853@svn.freebsd.org>
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Author: cognet Date: Wed Oct 6 22:25:21 2010 New Revision: 213496 URL: http://svn.freebsd.org/changeset/base/213496 Log: if_ate.c: * Support for sam9 "EMAC" controller. * Support for rmii interface to phy. at91.c & at91sam9.c: * Eliminate separate at91sam9.c file. * Add new devices to at91sam9_devs table. at91_machdep.c & at at91sam9_machdep.c: * Automatic chip type determination. * Remove compile time chip dependencies. * Eliminate separate at91sam9_machdep.c file. at91_pmc.c: * Corrected support for all of the sam926? and sam9g20 chips. * Remove compile time chip dependencies. My apologies to Greg for taking so long to take care of it. Added: head/sys/arm/at91/at91_pio_sam9g20.h (contents, props changed) head/sys/arm/at91/at91_reset.S (contents, props changed) head/sys/arm/at91/at91_rst.c (contents, props changed) head/sys/arm/at91/at91_rstreg.h (contents, props changed) head/sys/arm/at91/at91_wdt.c (contents, props changed) head/sys/arm/at91/at91_wdtreg.h (contents, props changed) head/sys/arm/at91/at91reg.h (contents, props changed) head/sys/arm/at91/at91rm9200.c (contents, props changed) head/sys/arm/at91/at91sam9g20.c (contents, props changed) head/sys/arm/at91/board_sam9g20ek.c (contents, props changed) head/sys/arm/at91/std.sam9g20ek (contents, props changed) Deleted: head/sys/arm/at91/at91_pio_sam9.h head/sys/arm/at91/at91sam9.c head/sys/arm/at91/at91sam9_machdep.c Modified: head/sys/arm/at91/at91.c head/sys/arm/at91/at91_machdep.c head/sys/arm/at91/at91_mci.c head/sys/arm/at91/at91_pio.c head/sys/arm/at91/at91_pio_rm9200.h head/sys/arm/at91/at91_pioreg.h head/sys/arm/at91/at91_pit.c head/sys/arm/at91/at91_pmc.c head/sys/arm/at91/at91_pmcreg.h head/sys/arm/at91/at91_pmcvar.h head/sys/arm/at91/at91_twi.c head/sys/arm/at91/at91_twireg.h head/sys/arm/at91/at91rm92reg.h head/sys/arm/at91/at91sam9g20reg.h head/sys/arm/at91/at91var.h head/sys/arm/at91/board_hl201.c head/sys/arm/at91/board_kb920x.c head/sys/arm/at91/files.at91 head/sys/arm/at91/files.at91sam9 head/sys/arm/at91/if_ate.c head/sys/arm/at91/if_atereg.h head/sys/arm/at91/if_macb.c head/sys/arm/at91/std.at91sam9 head/sys/arm/at91/std.kb920x head/sys/arm/at91/uart_cpu_at91rm9200usart.c head/sys/arm/at91/uart_dev_at91usart.c Modified: head/sys/arm/at91/at91.c ============================================================================== --- head/sys/arm/at91/at91.c Wed Oct 6 21:23:57 2010 (r213495) +++ head/sys/arm/at91/at91.c Wed Oct 6 22:25:21 2010 (r213496) @@ -1,5 +1,6 @@ /*- * Copyright (c) 2005 Olivier Houchard. All rights reserved. + * Copyright (c) 2010 Greg Ansley. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,14 +44,23 @@ __FBSDID("$FreeBSD$"); #include <machine/bus.h> #include <machine/intr.h> -#include <arm/at91/at91rm92reg.h> #include <arm/at91/at91var.h> +#include <arm/at91/at91_pmcvar.h> +#include <arm/at91/at91_aicreg.h> static struct at91_softc *at91_softc; static void at91_eoi(void *); +extern const struct pmap_devmap at91_devmap[]; + +uint32_t at91_chip_id; + +#ifdef AT91C_MASTER_CLOCK uint32_t at91_master_clock = AT91C_MASTER_CLOCK; +#else +uint32_t at91_master_clock; +#endif static int at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, @@ -99,6 +109,19 @@ at91_barrier(void *t, bus_space_handle_t { } +struct arm32_dma_range * +bus_dma_get_range(void) +{ + + return (NULL); +} + +int +bus_dma_get_range_nb(void) +{ + return (0); +} + bs_protos(generic); bs_protos(generic_armv4); @@ -212,6 +235,7 @@ struct bus_space at91_bs_tag = { static int at91_probe(device_t dev) { + device_set_desc(dev, "AT91 device bus"); arm_post_filter = at91_eoi; return (0); @@ -224,324 +248,38 @@ at91_identify(driver_t *drv, device_t pa BUS_ADD_CHILD(parent, 0, "atmelarm", 0); } -struct arm32_dma_range * -bus_dma_get_range(void) -{ - - return (NULL); -} - -int -bus_dma_get_range_nb(void) -{ - return (0); -} - -extern void irq_entry(void); - -static void -at91_add_child(device_t dev, int prio, const char *name, int unit, - bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2) -{ - device_t kid; - struct at91_ivar *ivar; - - kid = device_add_child_ordered(dev, prio, name, unit); - if (kid == NULL) { - printf("Can't add child %s%d ordered\n", name, unit); - return; - } - ivar = malloc(sizeof(*ivar), M_DEVBUF, M_NOWAIT | M_ZERO); - if (ivar == NULL) { - device_delete_child(dev, kid); - printf("Can't add alloc ivar\n"); - return; - } - device_set_ivars(kid, ivar); - resource_list_init(&ivar->resources); - if (irq0 != -1) - bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1); - if (irq1 != 0) - bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1); - if (irq2 != 0) - bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1); - if (addr != 0) - bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size); -} - -struct cpu_devs -{ - const char *name; - int unit; - bus_addr_t mem_base; - bus_size_t mem_len; - int irq0; - int irq1; - int irq2; -}; - -struct cpu_devs at91rm9200_devs[] = -{ - // All the "system" devices - { - "at91_st", 0, - AT91RM92_BASE + AT91RM92_ST_BASE, AT91RM92_ST_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_pio", 0, - AT91RM92_BASE + AT91RM92_PIOA_BASE, AT91RM92_PIO_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_pio", 1, - AT91RM92_BASE + AT91RM92_PIOB_BASE, AT91RM92_PIO_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_pio", 2, - AT91RM92_BASE + AT91RM92_PIOC_BASE, AT91RM92_PIO_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_pio", 3, - AT91RM92_BASE + AT91RM92_PIOD_BASE, AT91RM92_PIO_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_pmc", 0, - AT91RM92_BASE + AT91RM92_PMC_BASE, AT91RM92_PMC_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_aic", 0, - AT91RM92_BASE + AT91RM92_AIC_BASE, AT91RM92_AIC_SIZE, - 0 // Interrupt controller has no interrupts! - }, - { - "at91_rtc", 0, - AT91RM92_BASE + AT91RM92_RTC_BASE, AT91RM92_RTC_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "at91_mc", 0, - AT91RM92_BASE + AT91RM92_MC_BASE, AT91RM92_MC_SIZE, - AT91RM92_IRQ_SYSTEM - }, - - // All other devices - { - "at91_tc", 0, - AT91RM92_BASE + AT91RM92_TC0_BASE, AT91RM92_TC_SIZE, - AT91RM92_IRQ_TC0, AT91RM92_IRQ_TC1, AT91RM92_IRQ_TC2 - }, - { - "at91_tc", 1, - AT91RM92_BASE + AT91RM92_TC1_BASE, AT91RM92_TC_SIZE, - AT91RM92_IRQ_TC3, AT91RM92_IRQ_TC4, AT91RM92_IRQ_TC5 - }, - { - "at91_udp", 0, - AT91RM92_BASE + AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, - AT91RM92_IRQ_UDP, AT91RM92_IRQ_PIOB - }, - { - "at91_mci", 0, - AT91RM92_BASE + AT91RM92_MCI_BASE, AT91RM92_MCI_SIZE, - AT91RM92_IRQ_MCI - }, - { - "at91_twi", 0, - AT91RM92_BASE + AT91RM92_TWI_BASE, AT91RM92_TWI_SIZE, - AT91RM92_IRQ_TWI - }, - { - "ate", 0, - AT91RM92_BASE + AT91RM92_EMAC_BASE, AT91RM92_EMAC_SIZE, - AT91RM92_IRQ_EMAC - }, -#ifndef SKYEYE_WORKAROUNDS - { - "uart", 0, - AT91RM92_BASE + AT91RM92_DBGU_BASE, AT91RM92_DBGU_SIZE, - AT91RM92_IRQ_SYSTEM - }, - { - "uart", 1, - AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, - AT91RM92_IRQ_USART0 - }, - { - "uart", 2, - AT91RM92_BASE + AT91RM92_USART1_BASE, AT91RM92_USART_SIZE, - AT91RM92_IRQ_USART1 - }, - { - "uart", 3, - AT91RM92_BASE + AT91RM92_USART2_BASE, AT91RM92_USART_SIZE, - AT91RM92_IRQ_USART2 - }, - { - "uart", 4, - AT91RM92_BASE + AT91RM92_USART3_BASE, AT91RM92_USART_SIZE, - AT91RM92_IRQ_USART3 - }, -#else - { - "uart", 0, - AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, - AT91RM92_IRQ_USART0 - }, -#endif - { - "at91_ssc", 0, - AT91RM92_BASE + AT91RM92_SSC0_BASE, AT91RM92_SSC_SIZE, - AT91RM92_IRQ_SSC0 - }, - { - "at91_ssc", 1, - AT91RM92_BASE + AT91RM92_SSC1_BASE, AT91RM92_SSC_SIZE, - AT91RM92_IRQ_SSC1 - }, - { - "at91_ssc", 2, - AT91RM92_BASE + AT91RM92_SSC2_BASE, AT91RM92_SSC_SIZE, - AT91RM92_IRQ_SSC2 - }, - { - "spi", 0, - AT91RM92_BASE + AT91RM92_SPI_BASE, AT91RM92_SPI_SIZE, - AT91RM92_IRQ_SPI - }, - { - "ohci", 0, - AT91RM92_OHCI_BASE, AT91RM92_OHCI_SIZE, - AT91RM92_IRQ_UHP - }, - { - "at91_cfata", 0, - AT91RM92_CF_BASE, AT91RM92_CF_SIZE, - -1 - }, - { 0, 0, 0, 0, 0 } -}; - -static void -at91_cpu_add_builtin_children(device_t dev, struct at91_softc *sc) -{ - int i; - struct cpu_devs *walker; - - // XXX should look at the device id in the DBGU register and - // XXX based on the CPU load in these devices - for (i = 0, walker = at91rm9200_devs; walker->name; i++, walker++) { - at91_add_child(dev, i, walker->name, walker->unit, - walker->mem_base, walker->mem_len, walker->irq0, - walker->irq1, walker->irq2); - } -} - -#define NORMDEV 50 - -/* - * Standard priority levels for the system. 0 is lowest and 7 is highest. - * These values are the ones Atmel uses for its Linux port, which differ - * a little form the ones that are in the standard distribution. Also, - * the ones marked with 'TWEEK' are different based on experience. - */ -static int irq_prio[32] = -{ - 7, /* Advanced Interrupt Controller (FIQ) */ - 7, /* System Peripherals */ - 1, /* Parallel IO Controller A */ - 1, /* Parallel IO Controller B */ - 1, /* Parallel IO Controller C */ - 1, /* Parallel IO Controller D */ - 5, /* USART 0 */ - 5, /* USART 1 */ - 5, /* USART 2 */ - 5, /* USART 3 */ - 0, /* Multimedia Card Interface */ - 2, /* USB Device Port */ - 4, /* Two-Wire Interface */ /* TWEEK */ - 5, /* Serial Peripheral Interface */ - 4, /* Serial Synchronous Controller 0 */ - 6, /* Serial Synchronous Controller 1 */ /* TWEEK */ - 4, /* Serial Synchronous Controller 2 */ - 0, /* Timer Counter 0 */ - 6, /* Timer Counter 1 */ /* TWEEK */ - 0, /* Timer Counter 2 */ - 0, /* Timer Counter 3 */ - 0, /* Timer Counter 4 */ - 0, /* Timer Counter 5 */ - 2, /* USB Host port */ - 3, /* Ethernet MAC */ - 0, /* Advanced Interrupt Controller (IRQ0) */ - 0, /* Advanced Interrupt Controller (IRQ1) */ - 0, /* Advanced Interrupt Controller (IRQ2) */ - 0, /* Advanced Interrupt Controller (IRQ3) */ - 0, /* Advanced Interrupt Controller (IRQ4) */ - 0, /* Advanced Interrupt Controller (IRQ5) */ - 0 /* Advanced Interrupt Controller (IRQ6) */ -}; - static int at91_attach(device_t dev) { struct at91_softc *sc = device_get_softc(dev); - int i; + const struct pmap_devmap *pdevmap; at91_softc = sc; sc->sc_st = &at91_bs_tag; - sc->sc_sh = AT91RM92_BASE; + sc->sc_sh = AT91_BASE; sc->dev = dev; - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE, - AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0) - panic("Enable to map IRQ registers"); + sc->sc_irq_rman.rm_type = RMAN_ARRAY; sc->sc_irq_rman.rm_descr = "AT91 IRQs"; - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "AT91 Memory"; if (rman_init(&sc->sc_irq_rman) != 0 || rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) panic("at91_attach: failed to set up IRQ rman"); - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, 0xdff00000ul, - 0xdffffffful) != 0) + + sc->sc_mem_rman.rm_type = RMAN_ARRAY; + sc->sc_mem_rman.rm_descr = "AT91 Memory"; + if (rman_init(&sc->sc_mem_rman) != 0) panic("at91_attach: failed to set up memory rman"); - if (rman_manage_region(&sc->sc_mem_rman, AT91RM92_OHCI_BASE, - AT91RM92_OHCI_BASE + AT91RM92_OHCI_SIZE - 1) != 0) - panic("at91_attach: failed to set up ohci memory"); - if (rman_manage_region(&sc->sc_mem_rman, AT91RM92_CF_BASE, - AT91RM92_CF_BASE + AT91RM92_CF_SIZE - 1) != 0) - panic("at91_attach: failed to set up CompactFlash ATA memory"); - - for (i = 0; i < 32; i++) { - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SVR + - i * 4, i); - /* Priority. */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SMR + i * 4, - irq_prio[i]); - if (i < 8) - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_EOICR, - 1); + for ( pdevmap = at91_devmap; pdevmap->pd_va != 0; pdevmap++) { + if (rman_manage_region(&sc->sc_mem_rman, pdevmap->pd_va, + pdevmap->pd_va + pdevmap->pd_size - 1) != 0) + panic("at91_attach: failed to set up memory rman"); } - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SPU, 32); - /* No debug. */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_DCR, 0); - /* Disable and clear all interrupts. */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff); - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff); - - /* XXX */ - /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); - /* DIsable all interrupts for DBGU */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff); - /* Disable all interrupts for the SDRAM controller */ - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); - at91_cpu_add_builtin_children(dev, sc); + + /* Our device list will be added automatically by the cpu device + * e.g. at91rm9200.c when it is identified. To ensure that the + * CPU and PMC are attached first any other "identified" devices + * call BUS_ADD_CHILD(9) with an "order" of at least 2. */ bus_generic_probe(dev); bus_generic_attach(dev); @@ -630,11 +368,11 @@ at91_setup_intr(device_t dev, device_t c { struct at91_softc *sc = device_get_softc(dev); - if (rman_get_start(ires) == AT91RM92_IRQ_SYSTEM && filt == NULL) + if (rman_get_start(ires) == sc->sc_irq_system && filt == NULL) panic("All system interrupt ISRs must be FILTER"); BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt, intr, arg, cookiep); - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IECR, + bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IECR, 1 << rman_get_start(ires)); return (0); } @@ -645,7 +383,7 @@ at91_teardown_intr(device_t dev, device_ { struct at91_softc *sc = device_get_softc(dev); - bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, + bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 1 << rman_get_start(res)); return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); } @@ -697,8 +435,7 @@ arm_mask_irq(uintptr_t nb) { bus_space_write_4(at91_softc->sc_st, - at91_softc->sc_sys_sh, IC_IDCR, 1 << nb); - + at91_softc->sc_aic_sh, IC_IDCR, 1 << nb); } int @@ -708,12 +445,12 @@ arm_get_next_irq(int last __unused) int irq; irq = bus_space_read_4(at91_softc->sc_st, - at91_softc->sc_sys_sh, IC_IVR); + at91_softc->sc_aic_sh, IC_IVR); status = bus_space_read_4(at91_softc->sc_st, - at91_softc->sc_sys_sh, IC_ISR); + at91_softc->sc_aic_sh, IC_ISR); if (status == 0) { bus_space_write_4(at91_softc->sc_st, - at91_softc->sc_sys_sh, IC_EOICR, 1); + at91_softc->sc_aic_sh, IC_EOICR, 1); return (-1); } return (irq); @@ -724,16 +461,15 @@ arm_unmask_irq(uintptr_t nb) { bus_space_write_4(at91_softc->sc_st, - at91_softc->sc_sys_sh, IC_IECR, 1 << nb); - bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, + at91_softc->sc_aic_sh, IC_IECR, 1 << nb); + bus_space_write_4(at91_softc->sc_st, at91_softc->sc_aic_sh, IC_EOICR, 0); - } static void at91_eoi(void *unused) { - bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, + bus_space_write_4(at91_softc->sc_st, at91_softc->sc_aic_sh, IC_EOICR, 0); } @@ -761,6 +497,7 @@ static driver_t at91_driver = { at91_methods, sizeof(struct at91_softc), }; + static devclass_t at91_devclass; DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0); Modified: head/sys/arm/at91/at91_machdep.c ============================================================================== --- head/sys/arm/at91/at91_machdep.c Wed Oct 6 21:23:57 2010 (r213495) +++ head/sys/arm/at91/at91_machdep.c Wed Oct 6 22:25:21 2010 (r213496) @@ -90,9 +90,10 @@ __FBSDID("$FreeBSD$"); #include <sys/reboot.h> #include <arm/at91/at91board.h> +#include <arm/at91/at91var.h> #include <arm/at91/at91rm92reg.h> -#include <arm/at91/at91_piovar.h> -#include <arm/at91/at91_pio_rm9200.h> +#include <arm/at91/at91sam9g20reg.h> +#include <arm/at91/at91board.h> #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ #define KERNEL_PT_KERN 1 @@ -140,7 +141,7 @@ static void *boot_arg2; static struct trapframe proc0_tf; /* Static device mappings. */ -static const struct pmap_devmap at91rm9200_devmap[] = { +const struct pmap_devmap at91_devmap[] = { /* * Map the on-board devices VA == PA so that we can access them * with the MMU on or off. @@ -153,60 +154,88 @@ static const struct pmap_devmap at91rm92 */ 0xdff00000, 0xfff00000, - 0x100000, + 0x00100000, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, - /* - * We can't just map the OHCI registers VA == PA, because - * AT91RM92_OHCI_BASE belongs to the userland address space. + /* We can't just map the OHCI registers VA == PA, because + * AT91xx_xxx_BASE belongs to the userland address space. * We could just choose a different virtual address, but a better * solution would probably be to just use pmap_mapdev() to allocate * KVA, as we don't need the OHCI controller before the vm * initialization is done. However, the AT91 resource allocation * system doesn't know how to use pmap_mapdev() yet. + * Care must be taken to ensure PA and VM address do not overlap + * between entries. */ { /* * Add the ohci controller, and anything else that might be * on this chip select for a VA/PA mapping. */ + /* Internal Memory 1MB */ AT91RM92_OHCI_BASE, AT91RM92_OHCI_PA_BASE, - AT91RM92_OHCI_SIZE, + 0x00100000, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, { - /* CompactFlash controller. */ + /* CompactFlash controller. Portion of EBI CS4 1MB */ AT91RM92_CF_BASE, AT91RM92_CF_PA_BASE, - AT91RM92_CF_SIZE, + 0x00100000, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* The next two should be good for the 9260, 9261 and 9G20 since + * addresses mapping is the same. */ { - 0, - 0, - 0, - 0, - 0, - } + /* Internal Memory 1MB */ + AT91SAM9G20_OHCI_BASE, + AT91SAM9G20_OHCI_PA_BASE, + 0x00100000, + VM_PROT_READ|VM_PROT_WRITE, + PTE_NOCACHE, + }, + { + /* EBI CS3 256MB */ + AT91SAM9G20_NAND_BASE, + AT91SAM9G20_NAND_PA_BASE, + AT91SAM9G20_NAND_SIZE, + VM_PROT_READ|VM_PROT_WRITE, + PTE_NOCACHE, + }, + { 0, 0, 0, 0, 0, } }; long at91_ramsize(void) { - uint32_t *SDRAMC = (uint32_t *)(AT91RM92_BASE + AT91RM92_SDRAMC_BASE); + uint32_t *SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE); uint32_t cr, mr; int banks, rows, cols, bw; - cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; - mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; - bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; - banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; - rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; - cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; + if (at91_is_rm92()) { + SDRAMC = (uint32_t *)(AT91_BASE + AT91RM92_SDRAMC_BASE); + cr = SDRAMC[AT91RM92_SDRAMC_CR / 4]; + mr = SDRAMC[AT91RM92_SDRAMC_MR / 4]; + banks = (cr & AT91RM92_SDRAMC_CR_NB_4) ? 2 : 1; + rows = ((cr & AT91RM92_SDRAMC_CR_NR_MASK) >> 2) + 11; + cols = (cr & AT91RM92_SDRAMC_CR_NC_MASK) + 8; + bw = (mr & AT91RM92_SDRAMC_MR_DBW_16) ? 1 : 2; + } else { + /* This should be good for the 9260, 9261 and 9G20 as addresses + * and registers are the same */ + SDRAMC = (uint32_t *)(AT91_BASE + AT91SAM9G20_SDRAMC_BASE); + cr = SDRAMC[AT91SAM9G20_SDRAMC_CR / 4]; + mr = SDRAMC[AT91SAM9G20_SDRAMC_MR / 4]; + banks = (cr & AT91SAM9G20_SDRAMC_CR_NB_4) ? 2 : 1; + rows = ((cr & AT91SAM9G20_SDRAMC_CR_NR_MASK) >> 2) + 11; + cols = (cr & AT91SAM9G20_SDRAMC_CR_NC_MASK) + 8; + bw = (cr & AT91SAM9G20_SDRAMC_CR_DBW_16) ? 1 : 2; + } + return (1 << (cols + rows + banks + bw)); } @@ -326,13 +355,21 @@ initarm(void *arg, void *arg2) VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); } - pmap_devmap_bootstrap(l1pagetable, at91rm9200_devmap); + pmap_devmap_bootstrap(l1pagetable, at91_devmap); cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); setttb(kernel_l1pt.pv_pa); cpu_tlb_flushID(); cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); + cninit(); + + /* Get chip id so device drivers know about differences */ + at91_chip_id = *(volatile uint32_t *) + (AT91_BASE + AT91_DBGU_BASE + DBGU_C1R); + memsize = board_init(); + + printf("memsize = %d\n", memsize); physmem = memsize / PAGE_SIZE; /* Modified: head/sys/arm/at91/at91_mci.c ============================================================================== --- head/sys/arm/at91/at91_mci.c Wed Oct 6 21:23:57 2010 (r213495) +++ head/sys/arm/at91/at91_mci.c Wed Oct 6 22:25:21 2010 (r213496) @@ -1,6 +1,7 @@ /*- * Copyright (c) 2006 Bernd Walter. All rights reserved. * Copyright (c) 2006 M. Warner Losh. All rights reserved. + * Copyright (c) 2010 Greg Ansley. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -42,6 +43,7 @@ __FBSDID("$FreeBSD$"); #include <sys/queue.h> #include <sys/resource.h> #include <sys/rman.h> +#include <sys/sysctl.h> #include <sys/time.h> #include <sys/timetc.h> #include <sys/watchdog.h> @@ -52,16 +54,19 @@ __FBSDID("$FreeBSD$"); #include <machine/resource.h> #include <machine/frame.h> #include <machine/intr.h> -#include <arm/at91/at91rm92reg.h> + #include <arm/at91/at91var.h> #include <arm/at91/at91_mcireg.h> #include <arm/at91/at91_pdcreg.h> + #include <dev/mmc/bridge.h> #include <dev/mmc/mmcreg.h> #include <dev/mmc/mmcbrvar.h> #include "mmcbr_if.h" +#include "opt_at91.h" + #define BBSZ 512 struct at91_mci_softc { @@ -69,8 +74,9 @@ struct at91_mci_softc { device_t dev; int sc_cap; #define CAP_HAS_4WIRE 1 /* Has 4 wire bus */ -#define CAP_NEEDS_BOUNCE 2 /* broken hardware needing bounce */ +#define CAP_NEEDS_BYTESWAP 2 /* broken hardware needing bounce */ int flags; + int has_4wire; #define CMD_STARTED 1 #define STOP_STARTED 2 struct resource *irq_res; /* IRQ resource */ @@ -89,7 +95,7 @@ struct at91_mci_softc { static inline uint32_t RD4(struct at91_mci_softc *sc, bus_size_t off) { - return bus_read_4(sc->mem_res, off); + return (bus_read_4(sc->mem_res, off)); } static inline void @@ -140,7 +146,13 @@ at91_mci_init(device_t dev) WR4(sc, MCI_IDR, 0xffffffff); /* Turn off interrupts */ WR4(sc, MCI_DTOR, MCI_DTOR_DTOMUL_1M | 1); WR4(sc, MCI_MR, 0x834a); // XXX GROSS HACK FROM LINUX +#ifndef AT91_MCI_SLOT_B WR4(sc, MCI_SDCR, 0); /* SLOT A, 1 bit bus */ +#else + /* XXX Really should add second "unit" but nobody using using + * a two slot card that we know of. XXX */ + WR4(sc, MCI_SDCR, 1); /* SLOT B, 1 bit bus */ +#endif } static void @@ -165,11 +177,16 @@ static int at91_mci_attach(device_t dev) { struct at91_mci_softc *sc = device_get_softc(dev); - int err; + struct sysctl_ctx_list *sctx; + struct sysctl_oid *soid; device_t child; + int err; sc->dev = dev; - sc->sc_cap = CAP_NEEDS_BOUNCE; + + sc->sc_cap = 0; + if (at91_is_rm92()) + sc->sc_cap |= CAP_NEEDS_BYTESWAP; err = at91_mci_activate(dev); if (err) goto out; @@ -201,13 +218,28 @@ at91_mci_attach(device_t dev) AT91_MCI_LOCK_DESTROY(sc); goto out; } + + sctx = device_get_sysctl_ctx(dev); + soid = device_get_sysctl_tree(dev); + SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "4wire", + CTLFLAG_RW, &sc->has_4wire, 0, "has 4 wire SD Card bus"); + +#ifdef AT91_MCI_HAS_4WIRE + sc->has_4wire = 1; +#endif + if (sc->has_4wire) + sc->sc_cap |= CAP_HAS_4WIRE; + + sc->host.f_min = at91_master_clock / 512; sc->host.f_min = 375000; - sc->host.f_max = at91_master_clock / 2; /* Typically 30MHz */ + sc->host.f_max = at91_master_clock / 2; + if (sc->host.f_max > 50000000) + sc->host.f_max = 50000000; /* Limit to 50MHz */ + sc->host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + sc->host.caps = 0; if (sc->sc_cap & CAP_HAS_4WIRE) - sc->host.caps = MMC_CAP_4_BIT_DATA; - else - sc->host.caps = 0; + sc->host.caps |= MMC_CAP_4_BIT_DATA; child = device_add_child(dev, "mmc", 0); device_set_ivars(dev, &sc->host); err = bus_generic_attach(dev); @@ -237,11 +269,13 @@ at91_mci_activate(device_t dev) RF_ACTIVE); if (sc->mem_res == NULL) goto errout; + rid = 0; sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); if (sc->irq_res == NULL) goto errout; + return (0); errout: at91_mci_deactivate(dev); @@ -316,14 +350,16 @@ at91_mci_start_cmd(struct at91_mci_softc uint32_t *src, *dst; int i; struct mmc_data *data; - struct mmc_request *req; void *vaddr; bus_addr_t paddr; sc->curcmd = cmd; data = cmd->data; cmdr = cmd->opcode; - req = cmd->mrq; + + /* XXX Upper layers don't always set this */ + cmd->mrq = sc->req; + if (MMC_RSP(cmd->flags) == MMC_RSP_NONE) cmdr |= MCI_CMDR_RSPTYP_NO; else { @@ -364,26 +400,30 @@ at91_mci_start_cmd(struct at91_mci_softc if (cmdr & MCI_CMDR_TRDIR) vaddr = cmd->data->data; else { - if (sc->sc_cap & CAP_NEEDS_BOUNCE) { - vaddr = sc->bounce_buffer; - src = (uint32_t *)cmd->data->data; - dst = (uint32_t *)vaddr; + /* Use bounce buffer even if we don't need + * byteswap, since buffer may straddle a page + * boundry, and we don't handle multi-segment + * transfers in hardware. + * (page issues seen from 'bsdlabel -w' which + * uses raw geom access to the volume). + * Greg Ansley (gja (at) ansley.com) + */ + vaddr = sc->bounce_buffer; + src = (uint32_t *)cmd->data->data; + dst = (uint32_t *)vaddr; + if (sc->sc_cap & CAP_NEEDS_BYTESWAP) { for (i = 0; i < data->len / 4; i++) dst[i] = bswap32(src[i]); - } - else - vaddr = cmd->data->data; + } else + memcpy(dst, src, data->len); } data->xfer_len = 0; if (bus_dmamap_load(sc->dmatag, sc->map, vaddr, data->len, at91_mci_getaddr, &paddr, 0) != 0) { - if (req->cmd->flags & STOP_STARTED) - req->stop->error = MMC_ERR_NO_MEMORY; - else - req->cmd->error = MMC_ERR_NO_MEMORY; + cmd->error = MMC_ERR_NO_MEMORY; sc->req = NULL; sc->curcmd = NULL; - req->done(req); + cmd->mrq->done(cmd->mrq); return; } sc->mapped++; @@ -451,7 +491,7 @@ at91_mci_request(device_t brdev, device_ // XXX maybe the idea is naive... if (sc->req != NULL) { AT91_MCI_UNLOCK(sc); - return EBUSY; + return (EBUSY); } sc->req = req; sc->flags = 0; @@ -503,7 +543,7 @@ at91_mci_read_done(struct at91_mci_softc bus_dmamap_sync(sc->dmatag, sc->map, BUS_DMASYNC_POSTREAD); bus_dmamap_unload(sc->dmatag, sc->map); sc->mapped--; - if (sc->sc_cap & CAP_NEEDS_BOUNCE) { + if (sc->sc_cap & CAP_NEEDS_BYTESWAP) { walker = (uint32_t *)cmd->data->data; len = cmd->data->len / 4; for (i = 0; i < len; i++) @@ -653,6 +693,13 @@ at91_mci_read_ivar(device_t bus, device_ *(int *)result = sc->host.ios.vdd; break; case MMCBR_IVAR_CAPS: + if (sc->has_4wire) { + sc->sc_cap |= CAP_HAS_4WIRE; + sc->host.caps |= MMC_CAP_4_BIT_DATA; + } else { + sc->sc_cap &= ~CAP_HAS_4WIRE; + sc->host.caps &= ~MMC_CAP_4_BIT_DATA; + } *(int *)result = sc->host.caps; break; case MMCBR_IVAR_MAX_DATA: Modified: head/sys/arm/at91/at91_pio.c ============================================================================== --- head/sys/arm/at91/at91_pio.c Wed Oct 6 21:23:57 2010 (r213495) +++ head/sys/arm/at91/at91_pio.c Wed Oct 6 22:25:21 2010 (r213496) @@ -39,7 +39,7 @@ __FBSDID("$FreeBSD$"); #include <sys/rman.h> #include <machine/bus.h> -#include <arm/at91/at91rm92reg.h> +#include <arm/at91/at91reg.h> #include <arm/at91/at91_pioreg.h> #include <arm/at91/at91_piovar.h> @@ -58,7 +58,7 @@ struct at91_pio_softc static inline uint32_t RD4(struct at91_pio_softc *sc, bus_size_t off) { - return bus_read_4(sc->mem_res, off); + return (bus_read_4(sc->mem_res, off)); } static inline void @@ -283,7 +283,7 @@ at91_pio_ioctl(struct cdev *dev, u_long void at91_pio_use_periph_a(uint32_t pio, uint32_t periph_a_mask, int use_pullup) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_ASR / 4] = periph_a_mask; PIO[PIO_PDR / 4] = periph_a_mask; @@ -296,7 +296,7 @@ at91_pio_use_periph_a(uint32_t pio, uint void at91_pio_use_periph_b(uint32_t pio, uint32_t periph_b_mask, int use_pullup) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_BSR / 4] = periph_b_mask; PIO[PIO_PDR / 4] = periph_b_mask; @@ -309,7 +309,7 @@ at91_pio_use_periph_b(uint32_t pio, uint void at91_pio_use_gpio(uint32_t pio, uint32_t gpio_mask) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_PER / 4] = gpio_mask; } @@ -317,7 +317,7 @@ at91_pio_use_gpio(uint32_t pio, uint32_t void at91_pio_gpio_input(uint32_t pio, uint32_t input_enable_mask) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_ODR / 4] = input_enable_mask; } @@ -325,7 +325,7 @@ at91_pio_gpio_input(uint32_t pio, uint32 void at91_pio_gpio_output(uint32_t pio, uint32_t output_enable_mask, int use_pullup) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_OER / 4] = output_enable_mask; if (use_pullup) @@ -337,7 +337,7 @@ at91_pio_gpio_output(uint32_t pio, uint3 void at91_pio_gpio_set(uint32_t pio, uint32_t data_mask) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_SODR / 4] = data_mask; } @@ -345,7 +345,7 @@ at91_pio_gpio_set(uint32_t pio, uint32_t void at91_pio_gpio_clear(uint32_t pio, uint32_t data_mask) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); PIO[PIO_CODR / 4] = data_mask; } @@ -353,7 +353,7 @@ at91_pio_gpio_clear(uint32_t pio, uint32 uint8_t at91_pio_gpio_get(uint32_t pio, uint32_t data_mask) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); data_mask &= PIO[PIO_PDSR / 4]; @@ -363,7 +363,7 @@ at91_pio_gpio_get(uint32_t pio, uint32_t void at91_pio_gpio_set_deglitch(uint32_t pio, uint32_t data_mask, int use_deglitch) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); if (use_deglitch) PIO[PIO_IFER / 4] = data_mask; @@ -376,7 +376,7 @@ void at91_pio_gpio_set_interrupt(uint32_t pio, uint32_t data_mask, int enable_interrupt) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); if (enable_interrupt) PIO[PIO_IER / 4] = data_mask; @@ -388,7 +388,7 @@ at91_pio_gpio_set_interrupt(uint32_t pio uint32_t at91_pio_gpio_clear_interrupt(uint32_t pio) { - uint32_t *PIO = (uint32_t *)(AT91RM92_BASE + pio); + uint32_t *PIO = (uint32_t *)(AT91_BASE + pio); /* reading this register will clear the interrupts */ return (PIO[PIO_ISR / 4]); } Modified: head/sys/arm/at91/at91_pio_rm9200.h ============================================================================== --- head/sys/arm/at91/at91_pio_rm9200.h Wed Oct 6 21:23:57 2010 (r213495) +++ head/sys/arm/at91/at91_pio_rm9200.h Wed Oct 6 22:25:21 2010 (r213496) @@ -1,5 +1,9 @@ /* $FreeBSD$ */ +#ifndef ARM_AT91_AT91_PIO_RM9200_H +#define ARM_AT91_AT91_PIO_RM9200_H + +#include <arm/at91/at91_pioreg.h> /* * These defines come from an atmel file that says specifically that it * has no copyright. *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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