Date: Wed, 10 Dec 2003 18:49:55 -0800 (PST) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 43792 for review Message-ID: <200312110249.hBB2ntaK061837@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=43792 Change 43792 by peter@peter_daintree on 2003/12/10 18:48:58 integ -I -b i386_hammer Affected files ... .. //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#50 integrate .. //depot/projects/hammer/sys/amd64/amd64/mptable.c#20 integrate .. //depot/projects/hammer/sys/amd64/include/apicreg.h#8 integrate Differences ... ==== //depot/projects/hammer/sys/amd64/amd64/mp_machdep.c#50 (text+ko) ==== @@ -163,9 +163,9 @@ cpu_add(u_int apic_id, char boot_cpu) { - if (apic_id > MAXCPU) { + if (apic_id >= MAXCPU) { printf("SMP: CPU %d exceeds maximum CPU %d, ignoring\n", - apic_id, MAXCPU); + apic_id, MAXCPU - 1); return; } KASSERT(cpu_info[apic_id].cpu_present == 0, ("CPU %d added twice", ==== //depot/projects/hammer/sys/amd64/amd64/mptable.c#20 (text+ko) ==== @@ -54,7 +54,7 @@ /* string defined by the Intel MP Spec as identifying the MP table */ #define MP_SIG 0x5f504d5f /* _MP_ */ -#define NAPICID 32 /* Max number of I/O APIC's */ +#define NAPICID 32 /* Max number of APIC's */ #define BIOS_BASE (0xf0000) #define BIOS_SIZE (0x10000) @@ -811,7 +811,7 @@ * physical processor. If any of those ID's are * already in the table, then kill the fixup. */ - for (id = 0; id <= MAXCPU; id++) { + for (id = 0; id < NAPICID; id++) { if ((id_mask & 1 << id) == 0) continue; /* First, make sure we are on a logical_cpus boundary. */ ==== //depot/projects/hammer/sys/amd64/include/apicreg.h#8 (text+ko) ==== @@ -342,38 +342,6 @@ #define APIC_TDCR_128 0x0a #define APIC_TDCR_1 0x0b - -/* - * fields in IRR - * ISA INTerrupts are in bits 16-31 of the 1st IRR register. - * these masks DON'T EQUAL the isa IRQs of the same name. - */ -#define APIC_IRQ0 0x00000001 -#define APIC_IRQ1 0x00000002 -#define APIC_IRQ2 0x00000004 -#define APIC_IRQ3 0x00000008 -#define APIC_IRQ4 0x00000010 -#define APIC_IRQ5 0x00000020 -#define APIC_IRQ6 0x00000040 -#define APIC_IRQ7 0x00000080 -#define APIC_IRQ8 0x00000100 -#define APIC_IRQ9 0x00000200 -#define APIC_IRQ10 0x00000400 -#define APIC_IRQ11 0x00000800 -#define APIC_IRQ12 0x00001000 -#define APIC_IRQ13 0x00002000 -#define APIC_IRQ14 0x00004000 -#define APIC_IRQ15 0x00008000 -#define APIC_IRQ16 0x00010000 -#define APIC_IRQ17 0x00020000 -#define APIC_IRQ18 0x00040000 -#define APIC_IRQ19 0x00080000 -#define APIC_IRQ20 0x00100000 -#define APIC_IRQ21 0x00200000 -#define APIC_IRQ22 0x00400000 -#define APIC_IRQ23 0x00800000 - - /****************************************************************************** * I/O APIC defines */
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