Date: Wed, 22 Aug 2012 22:48:50 +0000 (UTC) From: Oleksandr Tymoshenko <gonzo@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r239597 - head/sys/arm/arm Message-ID: <201208222248.q7MMmojL011382@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: gonzo Date: Wed Aug 22 22:48:50 2012 New Revision: 239597 URL: http://svn.freebsd.org/changeset/base/239597 Log: Do not change "cachable" attribute for DMA memory allocated with BUS_DMA_COHERENT attribute The minimum unit for changing "cachable" attribute is page, so call to pmap_change_attr effectively disable cache for all pages that newly allocated DMA memory region spans on. The problem is that general-purpose memory could reside on these pages too and disabling cache might affect performance. Moreover ldrex/strex operators raise Data Abort exception when accessing memory on page with "cachable" attribute off. BUS_DMA_COHERENT does nto require memory to be coherent. It just suggests to do best effort for reducing synchronization overhead. Modified: head/sys/arm/arm/busdma_machdep-v6.c Modified: head/sys/arm/arm/busdma_machdep-v6.c ============================================================================== --- head/sys/arm/arm/busdma_machdep-v6.c Wed Aug 22 22:34:55 2012 (r239596) +++ head/sys/arm/arm/busdma_machdep-v6.c Wed Aug 22 22:48:50 2012 (r239597) @@ -618,10 +618,6 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, voi } dmat->map_count++; - if (flags & BUS_DMA_COHERENT) - pmap_change_attr((vm_offset_t)*vaddr, len, - BUS_DMA_NOCACHE); - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", __func__, dmat, dmat->flags, 0); return (0);
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201208222248.q7MMmojL011382>