Date: Wed, 17 May 2017 15:56:10 +0000 (UTC) From: Zbigniew Bodek <zbb@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r318408 - head/sys/arm/mv Message-ID: <201705171556.v4HFuAHg001444@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: zbb Date: Wed May 17 15:56:09 2017 New Revision: 318408 URL: https://svnweb.freebsd.org/changeset/base/318408 Log: Correct MPIC order of attachment If MPIC happens to be a slave interrupt controller (as on Armada38x), it should be attached after primary interrupt controller. Thus BUS_PASS_ORDER_LATE was added to default BUS_PASS_INTERRUPT. This change doesn't affect the cases when MPIC is standalone IC. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield, Netgate Reviewed by: loos Differential revision: https://reviews.freebsd.org/D10715 Modified: head/sys/arm/mv/mpic.c Modified: head/sys/arm/mv/mpic.c ============================================================================== --- head/sys/arm/mv/mpic.c Wed May 17 15:54:33 2017 (r318407) +++ head/sys/arm/mv/mpic.c Wed May 17 15:56:09 2017 (r318408) @@ -398,7 +398,7 @@ static driver_t mv_mpic_driver = { static devclass_t mv_mpic_devclass; EARLY_DRIVER_MODULE(mpic, simplebus, mv_mpic_driver, mv_mpic_devclass, 0, 0, - BUS_PASS_INTERRUPT); + BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); #ifndef INTRNG int
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201705171556.v4HFuAHg001444>