Date: Tue, 23 Jun 2009 04:02:37 +0000 (UTC) From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r194678 - head/sys/powerpc/include Message-ID: <200906230402.n5N42bP6063363@svn.freebsd.org>
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Author: nwhitehorn Date: Tue Jun 23 04:02:36 2009 New Revision: 194678 URL: http://svn.freebsd.org/changeset/base/194678 Log: Fix copy/paste typo in last revision. PMC0 control should be shifted 8 bits, not 6, on the PPC 970. Modified: head/sys/powerpc/include/spr.h Modified: head/sys/powerpc/include/spr.h ============================================================================== --- head/sys/powerpc/include/spr.h Tue Jun 23 02:19:59 2009 (r194677) +++ head/sys/powerpc/include/spr.h Tue Jun 23 04:02:36 2009 (r194678) @@ -336,7 +336,7 @@ #define SPR_MMCR0_TRIGGER 0x00002000 /* Trigger */ #define SPR_MMCR0_PMC1SEL(x) ((x) << 6) /* PMC1 selector */ #define SPR_MMCR0_PMC2SEL(x) ((x) << 0) /* PMC2 selector */ -#define SPR_970MMCR0_PMC1SEL(x) ((x) << 6) /* PMC1 selector (970) */ +#define SPR_970MMCR0_PMC1SEL(x) ((x) << 8) /* PMC1 selector (970) */ #define SPR_970MMCR0_PMC2SEL(x) ((x) << 1) /* PMC2 selector (970) */ #define SPR_SGR 0x3b9 /* 4.. Storage Guarded Register */ #define SPR_PMC1 0x3b9 /* .6. Performance Counter Register 1 */
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