Date: Wed, 17 Feb 2021 19:09:41 GMT From: Ed Maste <emaste@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: c72043506256 - main - gicv3_its: Leave LPI interrupts enabled during handling Message-ID: <202102171909.11HJ9fxG037184@gitrepo.freebsd.org>
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The branch main has been updated by emaste: URL: https://cgit.FreeBSD.org/src/commit/?id=c720435062566324459cb5dd1bdfc1d0e108c516 commit c720435062566324459cb5dd1bdfc1d0e108c516 Author: D Scott Phillips <scottph@FreeBSD.org> AuthorDate: 2021-02-17 19:06:48 +0000 Commit: Ed Maste <emaste@FreeBSD.org> CommitDate: 2021-02-17 19:08:38 +0000 gicv3_its: Leave LPI interrupts enabled during handling This follows the behavior on x86 where edge triggered interrupts are not disabled when executing the handler. Because the ITS is a shared resource, contention for the command queue lock can be substantial. Suggested by: gallatin Reviewed by: andrew Tested by: gallatin Sponsored by: Ampere Computing LLC Differential Revision: https://reviews.freebsd.org/D28709 --- sys/arm64/arm64/gicv3_its.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sys/arm64/arm64/gicv3_its.c b/sys/arm64/arm64/gicv3_its.c index 061d5a1dbdb9..ba7ccdc7d696 100644 --- a/sys/arm64/arm64/gicv3_its.c +++ b/sys/arm64/arm64/gicv3_its.c @@ -1013,7 +1013,6 @@ gicv3_its_pre_ithread(device_t dev, struct intr_irqsrc *isrc) sc = device_get_softc(dev); girq = (struct gicv3_its_irqsrc *)isrc; - gicv3_its_disable_intr(dev, isrc); gic_icc_write(EOIR1, girq->gi_lpi + GIC_FIRST_LPI); } @@ -1021,7 +1020,6 @@ static void gicv3_its_post_ithread(device_t dev, struct intr_irqsrc *isrc) { - gicv3_its_enable_intr(dev, isrc); } static void
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