Date: Thu, 29 Jul 2010 05:14:59 +0000 (UTC) From: Neel Natu <neel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r210596 - head/sys/mips/mips Message-ID: <201007290514.o6T5ExV4040366@svn.freebsd.org>
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Author: neel Date: Thu Jul 29 05:14:59 2010 New Revision: 210596 URL: http://svn.freebsd.org/changeset/base/210596 Log: Fix build for o32 kernels. The emulation of 'ld' and 'sd' instructions only works for ABIs that support 64-bit registers and the instructions 'ldl' and 'ldr' that operate on those registers. Reviewed by: jmallett Modified: head/sys/mips/mips/trap.c Modified: head/sys/mips/mips/trap.c ============================================================================== --- head/sys/mips/mips/trap.c Thu Jul 29 02:32:21 2010 (r210595) +++ head/sys/mips/mips/trap.c Thu Jul 29 05:14:59 2010 (r210596) @@ -1497,6 +1497,7 @@ mips_unaligned_load_store(struct trapfra reg[MIPS_INST_RT(inst)] = value; return (MIPS_LW_ACCESS); +#if defined(__mips_n32) || defined(__mips_n64) case OP_LD: KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); ldl_macro(value, addr); @@ -1504,6 +1505,7 @@ mips_unaligned_load_store(struct trapfra ldr_macro(value, addr); reg[MIPS_INST_RT(inst)] = value; return (MIPS_LD_ACCESS); +#endif case OP_SH: KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); @@ -1522,6 +1524,7 @@ mips_unaligned_load_store(struct trapfra swr_macro(value, addr); return (MIPS_SW_ACCESS); +#if defined(__mips_n32) || defined(__mips_n64) case OP_SD: KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); value = reg[MIPS_INST_RT(inst)]; @@ -1529,6 +1532,7 @@ mips_unaligned_load_store(struct trapfra addr += 7; sdr_macro(value, addr); return (MIPS_SD_ACCESS); +#endif } panic("%s: should not be reached.", __func__); }
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