Date: Fri, 14 Feb 2014 05:22:28 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r261870 - head/sys/mips/atheros Message-ID: <201402140522.s1E5MSnM055818@svn.freebsd.org>
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Author: adrian Date: Fri Feb 14 05:22:28 2014 New Revision: 261870 URL: http://svnweb.freebsd.org/changeset/base/261870 Log: Disable this check for now; it fails on the AR9344 PCI fixup code. I'll make it conditional later. Tested: * DB120 Modified: head/sys/mips/atheros/ar724x_pci.c Modified: head/sys/mips/atheros/ar724x_pci.c ============================================================================== --- head/sys/mips/atheros/ar724x_pci.c Fri Feb 14 04:03:17 2014 (r261869) +++ head/sys/mips/atheros/ar724x_pci.c Fri Feb 14 05:22:28 2014 (r261870) @@ -261,11 +261,13 @@ ar724x_pci_fixup(device_t dev, long flas uint32_t bar0, reg, val; uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr); +#if 0 if (cal_data[0] != AR5416_EEPROM_MAGIC) { device_printf(dev, "%s: Invalid calibration data from 0x%x\n", __func__, (uintptr_t) flash_addr); return; } +#endif /* Save bar(0) address - just to flush bar(0) (SoC WAR) ? */ bar0 = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_BAR(0), 4);
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