Date: Fri, 7 May 2004 08:39:08 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 52424 for review Message-ID: <200405071539.i47Fd8rR060261@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=52424 Change 52424 by peter@peter_daintree on 2004/05/07 08:38:25 MFi386: integ -I -b i386_hammer Affected files ... .. //depot/projects/hammer/sys/amd64/acpica/OsdEnvironment.c#11 integrate .. //depot/projects/hammer/sys/amd64/acpica/acpi_machdep.c#11 integrate .. //depot/projects/hammer/sys/amd64/acpica/acpi_wakeup.c#9 integrate .. //depot/projects/hammer/sys/amd64/acpica/madt.c#30 integrate .. //depot/projects/hammer/sys/amd64/amd64/apic_vector.S#19 integrate .. //depot/projects/hammer/sys/amd64/amd64/elf_machdep.c#23 integrate .. //depot/projects/hammer/sys/amd64/amd64/exception.S#28 integrate .. //depot/projects/hammer/sys/amd64/amd64/intr_machdep.c#16 integrate .. //depot/projects/hammer/sys/amd64/amd64/io_apic.c#23 integrate .. //depot/projects/hammer/sys/amd64/amd64/legacy.c#9 integrate .. //depot/projects/hammer/sys/amd64/amd64/local_apic.c#35 integrate .. //depot/projects/hammer/sys/amd64/amd64/machdep.c#83 integrate .. //depot/projects/hammer/sys/amd64/amd64/mptable.c#22 integrate .. //depot/projects/hammer/sys/amd64/amd64/mptable_pci.c#7 integrate .. //depot/projects/hammer/sys/amd64/amd64/nexus.c#21 integrate .. //depot/projects/hammer/sys/amd64/amd64/support.S#21 integrate .. //depot/projects/hammer/sys/amd64/conf/GENERIC#37 integrate .. //depot/projects/hammer/sys/amd64/conf/NOTES#26 integrate .. //depot/projects/hammer/sys/amd64/include/acpica_machdep.h#11 integrate .. //depot/projects/hammer/sys/amd64/include/apicvar.h#20 integrate .. //depot/projects/hammer/sys/amd64/include/float.h#8 integrate .. //depot/projects/hammer/sys/amd64/include/intr_machdep.h#11 integrate .. //depot/projects/hammer/sys/amd64/include/legacyvar.h#7 integrate .. //depot/projects/hammer/sys/amd64/include/pci_cfgreg.h#10 integrate .. //depot/projects/hammer/sys/amd64/isa/atpic.c#37 integrate .. //depot/projects/hammer/sys/amd64/isa/atpic_vector.S#16 integrate .. //depot/projects/hammer/sys/amd64/isa/clock.c#21 integrate .. //depot/projects/hammer/sys/amd64/pci/pci_bus.c#17 integrate Differences ... ==== //depot/projects/hammer/sys/amd64/acpica/OsdEnvironment.c#11 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/acpica/acpi_machdep.c#11 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/acpica/acpi_wakeup.c#9 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/acpica/madt.c#30 (text+ko) ==== @@ -69,14 +69,15 @@ u_int la_apic_id:8; } lapics[NLAPICS + 1]; +static int madt_found_sci_override; static MULTIPLE_APIC_TABLE *madt; static vm_paddr_t madt_physaddr; static vm_offset_t madt_length; MALLOC_DEFINE(M_MADT, "MADT Table", "ACPI MADT Table Items"); -static u_char interrupt_polarity(UINT16 Polarity); -static u_char interrupt_trigger(UINT16 TriggerMode); +static enum intr_polarity interrupt_polarity(UINT16 Polarity, UINT8 Source); +static enum intr_trigger interrupt_trigger(UINT16 TriggerMode, UINT8 Source); static int madt_find_cpu(u_int acpi_id, u_int *apic_id); static int madt_find_interrupt(int intr, void **apic, u_int *pin); static void *madt_map(vm_paddr_t pa, int offset, vm_offset_t length); @@ -325,6 +326,8 @@ static int madt_setup_io(void) { + void *ioapic; + u_int pin; int i; /* Try to initialize ACPI so that we can access the FADT. */ @@ -342,6 +345,23 @@ /* Second, we run through the table tweaking interrupt sources. */ madt_walk_table(madt_parse_ints, NULL); + /* + * If there was not an explicit override entry for the SCI, + * force it to use level trigger and active-low polarity. + */ + if (!madt_found_sci_override) { + if (madt_find_interrupt(AcpiGbl_FADT->SciInt, &ioapic, &pin) + != 0) + printf("MADT: Could not find APIC for SCI IRQ %d\n", + AcpiGbl_FADT->SciInt); + else { + printf( + "MADT: Forcing active-low polarity and level trigger for SCI\n"); + ioapic_set_polarity(ioapic, pin, INTR_POLARITY_LOW); + ioapic_set_triggermode(ioapic, pin, INTR_TRIGGER_LEVEL); + } + } + /* Third, we register all the I/O APIC's. */ for (i = 0; i < NIOAPICS; i++) if (ioapics[i].io_apic != NULL) @@ -448,33 +468,42 @@ /* * Determine properties of an interrupt source. Note that for ACPI, * these are only used for ISA interrupts, so we assume ISA bus values - * (Active Hi, Edge Triggered) for conforming values. + * (Active Hi, Edge Triggered) for conforming values except for the ACPI + * SCI for which we use Active Lo, Level Triggered.. */ -static u_char -interrupt_polarity(UINT16 Polarity) +static enum intr_polarity +interrupt_polarity(UINT16 Polarity, UINT8 Source) { switch (Polarity) { case POLARITY_CONFORMS: + if (Source == AcpiGbl_FADT->SciInt) + return (INTR_POLARITY_LOW); + else + return (INTR_POLARITY_HIGH); case POLARITY_ACTIVE_HIGH: - return (1); + return (INTR_POLARITY_HIGH); case POLARITY_ACTIVE_LOW: - return (0); + return (INTR_POLARITY_LOW); default: panic("Bogus Interrupt Polarity"); } } -static u_char -interrupt_trigger(UINT16 TriggerMode) +static enum intr_trigger +interrupt_trigger(UINT16 TriggerMode, UINT8 Source) { switch (TriggerMode) { case TRIGGER_CONFORMS: + if (Source == AcpiGbl_FADT->SciInt) + return (INTR_TRIGGER_LEVEL); + else + return (INTR_TRIGGER_EDGE); case TRIGGER_EDGE: - return (1); + return (INTR_TRIGGER_EDGE); case TRIGGER_LEVEL: - return (0); + return (INTR_TRIGGER_LEVEL); default: panic("Bogus Interrupt Trigger Mode"); } @@ -532,7 +561,9 @@ { void *new_ioapic, *old_ioapic; u_int new_pin, old_pin; - int force_lo; + enum intr_trigger trig; + enum intr_polarity pol; + char buf[64]; if (bootverbose) printf("MADT: intr override: source %u, irq %u\n", @@ -546,18 +577,46 @@ } /* - * If the SCI is remapped to a non-ISA global interrupt, - * force it to level trigger and active-lo polarity. + * Lookup the appropriate trigger and polarity modes for this + * entry. + */ + trig = interrupt_trigger(intr->TriggerMode, intr->Source); + pol = interrupt_polarity(intr->Polarity, intr->Source); + + /* * If the SCI is identity mapped but has edge trigger and - * active-hi polarity, also force it to use level/lo. + * active-hi polarity or the force_sci_lo tunable is set, + * force it to use level/lo. */ - force_lo = 0; - if (intr->Source == AcpiGbl_FADT->SciInt) - if (intr->Interrupt > 15 || (intr->Interrupt == intr->Source && - intr->TriggerMode == TRIGGER_EDGE && - intr->Polarity == POLARITY_ACTIVE_HIGH)) - force_lo = 1; + if (intr->Source == AcpiGbl_FADT->SciInt) { + madt_found_sci_override = 1; + if (getenv_string("hw.acpi.sci.trigger", buf, sizeof(buf))) { + if (tolower(buf[0]) == 'e') + trig = INTR_TRIGGER_EDGE; + else if (tolower(buf[0]) == 'l') + trig = INTR_TRIGGER_LEVEL; + else + panic( + "Invalid trigger %s: must be 'edge' or 'level'", + buf); + printf("MADT: Forcing SCI to %s trigger\n", + trig == INTR_TRIGGER_EDGE ? "edge" : "level"); + } + if (getenv_string("hw.acpi.sci.polarity", buf, sizeof(buf))) { + if (tolower(buf[0]) == 'h') + pol = INTR_POLARITY_HIGH; + else if (tolower(buf[0]) == 'l') + pol = INTR_POLARITY_LOW; + else + panic( + "Invalid polarity %s: must be 'high' or 'low'", + buf); + printf("MADT: Forcing SCI to active %s polarity\n", + pol == INTR_POLARITY_HIGH ? "high" : "low"); + } + } + /* Remap the IRQ if it is mapped to a different interrupt vector. */ if (intr->Source != intr->Interrupt) { /* * If the SCI is remapped to a non-ISA global interrupt, @@ -577,18 +636,10 @@ intr->Source) ioapic_disable_pin(old_ioapic, old_pin); } - if (force_lo) { - printf( - "MADT: Forcing active-lo polarity and level trigger for IRQ %d\n", - intr->Source); - ioapic_set_polarity(new_ioapic, new_pin, 0); - ioapic_set_triggermode(new_ioapic, new_pin, 0); - } else { - ioapic_set_polarity(new_ioapic, new_pin, - interrupt_polarity(intr->Polarity)); - ioapic_set_triggermode(new_ioapic, new_pin, - interrupt_trigger(intr->TriggerMode)); - } + + /* Program the polarity and trigger mode. */ + ioapic_set_triggermode(new_ioapic, new_pin, trig); + ioapic_set_polarity(new_ioapic, new_pin, pol); } /* @@ -609,10 +660,10 @@ ioapic_set_nmi(ioapic, pin); if (nmi->TriggerMode != TRIGGER_CONFORMS) ioapic_set_triggermode(ioapic, pin, - interrupt_trigger(nmi->TriggerMode)); + interrupt_trigger(nmi->TriggerMode, 0)); if (nmi->Polarity != TRIGGER_CONFORMS) ioapic_set_polarity(ioapic, pin, - interrupt_polarity(nmi->Polarity)); + interrupt_polarity(nmi->Polarity, 0)); } /* @@ -638,10 +689,10 @@ lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); if (nmi->TriggerMode != TRIGGER_CONFORMS) lapic_set_lvt_triggermode(apic_id, pin, - interrupt_trigger(nmi->TriggerMode)); + interrupt_trigger(nmi->TriggerMode, 0)); if (nmi->Polarity != POLARITY_CONFORMS) lapic_set_lvt_polarity(apic_id, pin, - interrupt_polarity(nmi->Polarity)); + interrupt_polarity(nmi->Polarity, 0)); } /* ==== //depot/projects/hammer/sys/amd64/amd64/apic_vector.S#19 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/amd64/elf_machdep.c#23 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/amd64/exception.S#28 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/amd64/intr_machdep.c#16 (text+ko) ==== @@ -138,6 +138,17 @@ return (error); } +int +intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol) +{ + struct intsrc *isrc; + + isrc = intr_lookup_source(vector); + if (isrc == NULL) + return (EINVAL); + return (isrc->is_pic->pic_config_intr(isrc, trig, pol)); +} + void intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe) { ==== //depot/projects/hammer/sys/amd64/amd64/io_apic.c#23 (text+ko) ==== @@ -128,6 +128,8 @@ static void ioapic_enable_intr(struct intsrc *isrc); static int ioapic_vector(struct intsrc *isrc); static int ioapic_source_pending(struct intsrc *isrc); +static int ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig, + enum intr_polarity pol); static void ioapic_suspend(struct intsrc *isrc); static void ioapic_resume(struct intsrc *isrc); static void ioapic_program_destination(struct ioapic_intsrc *intpin); @@ -138,7 +140,8 @@ struct pic ioapic_template = { ioapic_enable_source, ioapic_disable_source, ioapic_eoi_source, ioapic_enable_intr, ioapic_vector, ioapic_source_pending, - ioapic_suspend, ioapic_resume }; + ioapic_suspend, ioapic_resume, + ioapic_config_intr }; static int next_ioapic_base, logical_clusters, current_cluster; @@ -291,6 +294,41 @@ return (lapic_intr_pending(intpin->io_vector)); } +static int +ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig, + enum intr_polarity pol) +{ + struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc; + struct ioapic *io = (struct ioapic *)isrc->is_pic; + + KASSERT(!(trig == INTR_TRIGGER_CONFORM || pol == INTR_POLARITY_CONFORM), + ("%s: Conforming trigger or polarity\n", __func__)); + + /* + * For now we ignore any requests but do output any changes that + * would be made to the console it bootverbose is enabled. The only + * known causes of these messages so far is a bug in acpi(4) that + * causes the ISA IRQs used for PCI interrupts in PIC mode to be + * set to level/low when they aren't being used. There are possibly + * legitimate requests, so at some point when the acpi(4) driver is + * fixed this code can be changed to actually change the intpin as + * requested. + */ + if (!bootverbose) + return (0); + if (intpin->io_edgetrigger != (trig == INTR_TRIGGER_EDGE)) + printf( + "ioapic%u: Request to change trigger for pin %u to %s ignored\n", + io->io_id, intpin->io_intpin, trig == INTR_TRIGGER_EDGE ? + "edge" : "level"); + if (intpin->io_activehi != (pol == INTR_POLARITY_HIGH)) + printf( + "ioapic%u: Request to change polarity for pin %u to %s ignored\n", + io->io_id, intpin->io_intpin, pol == INTR_POLARITY_HIGH ? + "high" : "low"); + return (0); +} + static void ioapic_suspend(struct intsrc *isrc) { @@ -526,36 +564,36 @@ } int -ioapic_set_polarity(void *cookie, u_int pin, char activehi) +ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol) { struct ioapic *io; io = (struct ioapic *)cookie; - if (pin >= io->io_numintr) + if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM) return (EINVAL); if (io->io_pins[pin].io_vector >= NUM_IO_INTS) return (EINVAL); - io->io_pins[pin].io_activehi = activehi; + io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH); if (bootverbose) printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin, - activehi ? "active-hi" : "active-lo"); + pol == INTR_POLARITY_HIGH ? "high" : "low"); return (0); } int -ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger) +ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger) { struct ioapic *io; io = (struct ioapic *)cookie; - if (pin >= io->io_numintr) + if (pin >= io->io_numintr || trigger == INTR_TRIGGER_CONFORM) return (EINVAL); if (io->io_pins[pin].io_vector >= NUM_IO_INTS) return (EINVAL); - io->io_pins[pin].io_edgetrigger = edgetrigger; + io->io_pins[pin].io_edgetrigger = (trigger == INTR_TRIGGER_EDGE); if (bootverbose) printf("ioapic%u: intpin %d trigger: %s\n", io->io_id, pin, - edgetrigger ? "edge" : "level"); + trigger == INTR_TRIGGER_EDGE ? "edge" : "level"); return (0); } ==== //depot/projects/hammer/sys/amd64/amd64/legacy.c#9 (text+ko) ==== @@ -41,7 +41,9 @@ #include <sys/kernel.h> #include <sys/malloc.h> #include <machine/bus.h> +#include <sys/pcpu.h> #include <sys/rman.h> +#include <sys/smp.h> #include <machine/legacyvar.h> #include <machine/resource.h> @@ -138,7 +140,9 @@ static int legacy_attach(device_t dev) { - device_t child; + device_t child; + int i; + struct pcpu *pc; /* * First, let our child driver's identify any child devices that @@ -148,6 +152,21 @@ bus_generic_probe(dev); bus_generic_attach(dev); + /* Attach CPU pseudo-driver. */ + if (!devclass_get_device(devclass_find("cpu"), 0)) { + for (i = 0; i <= mp_maxid; i++) + if (!CPU_ABSENT(i)) { + pc = pcpu_find(i); + KASSERT(pc != NULL, ("pcpu_find failed")); + child = BUS_ADD_CHILD(dev, 0, "cpu", i); + if (child == NULL) + panic("legacy_attach cpu"); + device_probe_and_attach(child); + pc->pc_device = child; + device_set_ivars(child, pc); + } + } + /* * If we didn't see ISA on a pci bridge, create some * connection points now so it shows up "on motherboard". @@ -305,3 +324,54 @@ resource_list_delete(rl, type, rid); } + +/* + * Legacy CPU attachment when ACPI is not available. Drivers like + * cpufreq(4) hang off this. + */ +static int cpu_read_ivar(device_t dev, device_t child, int index, + uintptr_t *result); + +static device_method_t cpu_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, bus_generic_probe), + DEVMETHOD(device_attach, bus_generic_attach), + DEVMETHOD(device_detach, bus_generic_detach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, cpu_read_ivar), + DEVMETHOD(bus_print_child, bus_generic_print_child), + DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), + DEVMETHOD(bus_release_resource, bus_generic_release_resource), + DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), + DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), + DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), + DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), + + { 0, 0 } +}; + +static driver_t cpu_driver = { + "cpu", + cpu_methods, + 1, /* no softc */ +}; +static devclass_t cpu_devclass; +DRIVER_MODULE(cpu, legacy, cpu_driver, cpu_devclass, 0, 0); + +static int +cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) +{ + struct pcpu *pc; + + if (index != 0) + return (ENOENT); + pc = device_get_ivars(child); + if (pc == NULL) + return (ENOENT); + *result = (uintptr_t)pc; + return (0); +} ==== //depot/projects/hammer/sys/amd64/amd64/local_apic.c#35 (text+ko) ==== @@ -427,50 +427,52 @@ } int -lapic_set_lvt_polarity(u_int apic_id, u_int pin, u_char activehi) +lapic_set_lvt_polarity(u_int apic_id, u_int pin, enum intr_polarity pol) { - if (pin > LVT_MAX) + if (pin > LVT_MAX || pol == INTR_POLARITY_CONFORM) return (EINVAL); if (apic_id == APIC_ID_ALL) { - lvts[pin].lvt_activehi = activehi; + lvts[pin].lvt_activehi = (pol == INTR_POLARITY_HIGH); if (bootverbose) printf("lapic:"); } else { KASSERT(lapics[apic_id].la_present, ("%s: missing APIC %u", __func__, apic_id)); lapics[apic_id].la_lvts[pin].lvt_active = 1; - lapics[apic_id].la_lvts[pin].lvt_activehi = activehi; + lapics[apic_id].la_lvts[pin].lvt_activehi = + (pol == INTR_POLARITY_HIGH); if (bootverbose) printf("lapic%u:", apic_id); } if (bootverbose) printf(" LINT%u polarity: active-%s\n", pin, - activehi ? "hi" : "lo"); + pol == INTR_POLARITY_HIGH ? "high" : "low"); return (0); } int -lapic_set_lvt_triggermode(u_int apic_id, u_int pin, u_char edgetrigger) +lapic_set_lvt_triggermode(u_int apic_id, u_int pin, enum intr_trigger trigger) { - if (pin > LVT_MAX) + if (pin > LVT_MAX || trigger == INTR_TRIGGER_CONFORM) return (EINVAL); if (apic_id == APIC_ID_ALL) { - lvts[pin].lvt_edgetrigger = edgetrigger; + lvts[pin].lvt_edgetrigger = (trigger == INTR_TRIGGER_EDGE); if (bootverbose) printf("lapic:"); } else { KASSERT(lapics[apic_id].la_present, ("%s: missing APIC %u", __func__, apic_id)); - lapics[apic_id].la_lvts[pin].lvt_edgetrigger = edgetrigger; + lapics[apic_id].la_lvts[pin].lvt_edgetrigger = + (trigger == INTR_TRIGGER_EDGE); lapics[apic_id].la_lvts[pin].lvt_active = 1; if (bootverbose) printf("lapic%u:", apic_id); } if (bootverbose) printf(" LINT%u trigger: %s\n", pin, - edgetrigger ? "edge" : "level"); + trigger == INTR_TRIGGER_EDGE ? "edge" : "level"); return (0); } ==== //depot/projects/hammer/sys/amd64/amd64/machdep.c#83 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/amd64/mptable.c#22 (text+ko) ==== @@ -47,10 +47,6 @@ #include <dev/pci/pcivar.h> -/* EISA Edge/Level trigger control registers */ -#define ELCR0 0x4d0 /* eisa irq 0-7 */ -#define ELCR1 0x4d1 /* eisa irq 8-15 */ - /* string defined by the Intel MP Spec as identifying the MP table */ #define MP_SIG 0x5f504d5f /* _MP_ */ @@ -147,10 +143,11 @@ MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items"); -static u_char conforming_polarity(u_char src_bus); -static u_char conforming_trigger(u_char src_bus, u_char src_bus_irq); -static u_char intentry_polarity(int_entry_ptr intr); -static u_char intentry_trigger(int_entry_ptr intr); +static enum intr_polarity conforming_polarity(u_char src_bus, + u_char src_bus_irq); +static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq); +static enum intr_polarity intentry_polarity(int_entry_ptr intr); +static enum intr_trigger intentry_trigger(int_entry_ptr intr); static int lookup_bus_type(char *name); static void mptable_count_items(void); static void mptable_count_items_handler(u_char *entry, void *arg); @@ -539,19 +536,24 @@ /* * Determine conforming polarity for a given bus type. */ -static u_char -conforming_polarity(u_char src_bus) +static enum intr_polarity +conforming_polarity(u_char src_bus, u_char src_bus_irq) { KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); switch (busses[src_bus].bus_type) { case ISA: + return (INTR_POLARITY_HIGH); + case PCI: + return (INTR_POLARITY_LOW); +#ifndef PC98 case EISA: - /* Active Hi */ - return (1); - case PCI: - /* Active Lo */ - return (0); + KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq)); + if (elcr_read_trigger(src_bus_irq) == INTR_TRIGGER_LEVEL) + return (INTR_POLARITY_LOW); + else + return (INTR_POLARITY_HIGH); +#endif default: panic("%s: unknown bus type %d", __func__, busses[src_bus].bus_type); @@ -561,52 +563,45 @@ /* * Determine conforming trigger for a given bus type. */ -static u_char +static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq) { - static int eisa_int_control = -1; KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus)); switch (busses[src_bus].bus_type) { case ISA: - /* Edge Triggered */ - return (1); + return (INTR_TRIGGER_EDGE); case PCI: - /* Level Triggered */ - return (0); + return (INTR_TRIGGER_LEVEL); +#ifndef PC98 case EISA: KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq)); - if (eisa_int_control == -1) - eisa_int_control = inb(ELCR1) << 8 | inb(ELCR0); - if (eisa_int_control & (1 << src_bus_irq)) - /* Level Triggered */ - return (0); - else - /* Edge Triggered */ - return (1); + return (elcr_read_trigger(src_bus_irq)); +#endif default: panic("%s: unknown bus type %d", __func__, busses[src_bus].bus_type); } } -static u_char +static enum intr_polarity intentry_polarity(int_entry_ptr intr) { switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) { case INTENTRY_FLAGS_POLARITY_CONFORM: - return (conforming_polarity(intr->src_bus_id)); + return (conforming_polarity(intr->src_bus_id, + intr->src_bus_irq)); case INTENTRY_FLAGS_POLARITY_ACTIVEHI: - return (1); + return (INTR_POLARITY_HIGH); case INTENTRY_FLAGS_POLARITY_ACTIVELO: - return (0); + return (INTR_POLARITY_LOW); default: panic("Bogus interrupt flags"); } } -static u_char +static enum intr_trigger intentry_trigger(int_entry_ptr intr) { @@ -615,9 +610,9 @@ return (conforming_trigger(intr->src_bus_id, intr->src_bus_irq)); case INTENTRY_FLAGS_TRIGGER_EDGE: - return (1); + return (INTR_TRIGGER_EDGE); case INTENTRY_FLAGS_TRIGGER_LEVEL: - return (0); + return (INTR_TRIGGER_LEVEL); default: panic("Bogus interrupt flags"); } ==== //depot/projects/hammer/sys/amd64/amd64/mptable_pci.c#7 (text+ko) ==== @@ -64,10 +64,18 @@ return (0); } +static int +mptable_hostb_attach(device_t dev) +{ + + device_add_child(dev, "pci", pcib_get_bus(dev)); + return (bus_generic_attach(dev)); +} + static device_method_t mptable_hostb_methods[] = { /* Device interface */ DEVMETHOD(device_probe, mptable_hostb_probe), - DEVMETHOD(device_attach, legacy_pcib_attach), + DEVMETHOD(device_attach, mptable_hostb_attach), DEVMETHOD(device_shutdown, bus_generic_shutdown), DEVMETHOD(device_suspend, bus_generic_suspend), DEVMETHOD(device_resume, bus_generic_resume), ==== //depot/projects/hammer/sys/amd64/amd64/nexus.c#21 (text+ko) ==== @@ -84,6 +84,8 @@ int unit); static struct resource *nexus_alloc_resource(device_t, device_t, int, int *, u_long, u_long, u_long, u_int); +static int nexus_config_intr(device_t, int, enum intr_trigger, + enum intr_polarity); static int nexus_activate_resource(device_t, device_t, int, int, struct resource *); static int nexus_deactivate_resource(device_t, device_t, int, int, @@ -116,6 +118,7 @@ DEVMETHOD(bus_deactivate_resource, nexus_deactivate_resource), DEVMETHOD(bus_setup_intr, nexus_setup_intr), DEVMETHOD(bus_teardown_intr, nexus_teardown_intr), + DEVMETHOD(bus_config_intr, nexus_config_intr), DEVMETHOD(bus_set_resource, nexus_set_resource), DEVMETHOD(bus_get_resource, nexus_get_resource), DEVMETHOD(bus_delete_resource, nexus_delete_resource), @@ -453,6 +456,13 @@ } static int +nexus_config_intr(device_t dev, int irq, enum intr_trigger trig, + enum intr_polarity pol) +{ + return (intr_config_intr(irq, trig, pol)); +} + +static int nexus_set_resource(device_t dev, device_t child, int type, int rid, u_long start, u_long count) { struct nexus_device *ndev = DEVTONX(child); ==== //depot/projects/hammer/sys/amd64/amd64/support.S#21 (text+ko) ==== @@ -624,11 +624,11 @@ nop 1: movl $KDSEL, %eax - mov %ax,%ds - mov %ax,%es - mov %ax,%fs /* Beware, use wrmsr to set 64 bit base */ - mov %ax,%gs - mov %ax,%ss + movl %eax,%ds + movl %eax,%es + movl %eax,%fs /* Beware, use wrmsr to set 64 bit base */ + movl %eax,%gs + movl %eax,%ss /* reload code selector by turning return into intersegmental return */ popq %rax ==== //depot/projects/hammer/sys/amd64/conf/GENERIC#37 (text+ko) ==== @@ -45,6 +45,7 @@ options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework options GEOM_GPT # GUID Partition Tables. +options COMPAT_43 # Compatible with BSD 4.3 [KEEP THIS!] options IA32 # Compatible with i386 binaries options COMPAT_FREEBSD4 # Compatible with FreeBSD4 options SCSI_DELAY=15000 # Delay (in ms) before probing SCSI @@ -73,6 +74,7 @@ device atpic # 8259A compatability options NO_MIXED_MODE # Don't penalize working chipsets +# Bus support. Do not remove isa, even if you have no isa slots device acpi device isa device pci @@ -259,6 +261,7 @@ device axe # ASIX Electronics USB Ethernet device cue # CATC USB Ethernet device kue # Kawasaki LSI USB Ethernet +device rue # RealTek RTL8150 USB Ethernet # FireWire support device firewire # FireWire bus code ==== //depot/projects/hammer/sys/amd64/conf/NOTES#26 (text+ko) ==== @@ -4,7 +4,7 @@ # This file contains machine dependent kernel configuration notes. For # machine independent notes, look in /sys/conf/NOTES. # -# (XXX from i386:NOTES,v 1.1152) +# (XXX from i386:NOTES,v 1.1158) # $FreeBSD: src/sys/amd64/conf/NOTES,v 1.12 2004/03/13 22:16:34 peter Exp $ # @@ -120,7 +120,7 @@ # # ISA bus # -device isa +device isa # Required by npx(4) # # Options for `isa': @@ -303,6 +303,12 @@ # The Rev 2 host cards use a 32K chunk, on a 32K boundary. # The cards can use an IRQ of 11, 12 or 15. +device cy +options CY_PCI_FASTINTR # Use with cy_pci unless irq is shared +hint.cy.0.at="isa" +hint.cy.0.irq="10" +hint.cy.0.maddr="0xd4000" +hint.cy.0.msize="0x2000" device digi hint.digi.0.at="isa" hint.digi.0.port="0x104" @@ -432,9 +438,10 @@ # #--------------------------------------------------------------------------- -# sx device is i386 and pc98 only at the moment. -device sx -options SX_DEBUG +# +# System Management Bus (SMB) +# +options ENABLE_ALART # Control alarm on Intel intpm driver # # Set the number of PV entries per process. Increasing this can @@ -505,7 +512,6 @@ options FB_INSTALL_CDEV # install a CDEV entry in /dev -options ENABLE_ALART # Control alarm on Intel intpm driver options KBDIO_DEBUG=2 options KBD_MAXRETRY=4 options KBD_MAXWAIT=6 ==== //depot/projects/hammer/sys/amd64/include/acpica_machdep.h#11 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/include/apicvar.h#20 (text+ko) ==== @@ -143,8 +143,9 @@ int ioapic_remap_vector(void *cookie, u_int pin, int vector); int ioapic_set_extint(void *cookie, u_int pin); int ioapic_set_nmi(void *cookie, u_int pin); -int ioapic_set_polarity(void *cookie, u_int pin, char activehi); -int ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger); +int ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol); +int ioapic_set_triggermode(void *cookie, u_int pin, + enum intr_trigger trigger); int ioapic_set_smi(void *cookie, u_int pin); void lapic_create(u_int apic_id, int boot_cpu); void lapic_disable(void); @@ -161,8 +162,10 @@ void lapic_set_logical_id(u_int apic_id, u_int cluster, u_int cluster_id); int lapic_set_lvt_mask(u_int apic_id, u_int lvt, u_char masked); int lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode); -int lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi); -int lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger); +int lapic_set_lvt_polarity(u_int apic_id, u_int lvt, + enum intr_polarity pol); +int lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, + enum intr_trigger trigger); void lapic_setup(void); #endif /* !LOCORE */ ==== //depot/projects/hammer/sys/amd64/include/float.h#8 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/include/intr_machdep.h#11 (text+ko) ==== @@ -57,6 +57,8 @@ int (*pic_source_pending)(struct intsrc *); void (*pic_suspend)(struct intsrc *); void (*pic_resume)(struct intsrc *); + int (*pic_config_intr)(struct intsrc *, enum intr_trigger, + enum intr_polarity); }; /* @@ -77,8 +79,15 @@ extern struct mtx icu_lock; +/* XXX: The elcr_* prototypes probably belong somewhere else. */ +int elcr_probe(void); +enum intr_trigger elcr_read_trigger(u_int irq); +void elcr_resume(void); +void elcr_write_trigger(u_int irq, enum intr_trigger trigger); int intr_add_handler(const char *name, int vector, driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep); +int intr_config_intr(int vector, enum intr_trigger trig, + enum intr_polarity pol); void intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe); struct intsrc *intr_lookup_source(int vector); int intr_register_source(struct intsrc *isrc); ==== //depot/projects/hammer/sys/amd64/include/legacyvar.h#7 (text+ko) ==== @@ -40,7 +40,6 @@ #undef LEGACY_ACCESSOR -int legacy_pcib_attach(device_t dev); int legacy_pcib_maxslots(device_t dev); u_int32_t legacy_pcib_read_config(device_t dev, int bus, int slot, int func, int reg, int bytes); ==== //depot/projects/hammer/sys/amd64/include/pci_cfgreg.h#10 (text+ko) ==== ==== //depot/projects/hammer/sys/amd64/isa/atpic.c#37 (text+ko) ==== @@ -81,9 +81,16 @@ #define SLAVE_MODE BASE_SLAVE_MODE #endif +#define IMEN_MASK(ai) (1 << (ai)->at_irq) + +#define NUM_ISA_IRQS 16 + static void atpic_init(void *dummy); unsigned int imen; /* XXX */ +#ifndef PC98 +static int using_elcr; +#endif inthand_t IDTVEC(atpic_intr0), IDTVEC(atpic_intr1), IDTVEC(atpic_intr2), @@ -95,14 +102,15 @@ #define IRQ(ap, ai) ((ap)->at_irqbase + (ai)->at_irq) -#define ATPIC(io, base, eoi, imenptr) \ +#define ATPIC(io, base, eoi, imenptr) \ { { atpic_enable_source, atpic_disable_source, (eoi), \ atpic_enable_intr, atpic_vector, atpic_source_pending, NULL, \ - atpic_resume }, (io), (base), IDT_IO_INTS + (base), (imenptr) } + atpic_resume, atpic_config_intr }, (io), (base), \ + IDT_IO_INTS + (base), (imenptr) } #define INTSRC(irq) \ - { { &atpics[(irq) / 8].at_pic }, (irq) % 8, \ - IDTVEC(atpic_intr ## irq ) } + { { &atpics[(irq) / 8].at_pic }, IDTVEC(atpic_intr ## irq ), \ + (irq) % 8 } struct atpic { struct pic at_pic; @@ -114,8 +122,9 @@ struct atpic_intsrc { struct intsrc at_intsrc; - int at_irq; /* Relative to PIC base. */ inthand_t *at_intr; + int at_irq; /* Relative to PIC base. */ + enum intr_trigger at_trigger; u_long at_count; >>> TRUNCATED FOR MAIL (1000 lines) <<<
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