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Date:      Thu, 5 Nov 2020 00:52:53 +0000 (UTC)
From:      Mitchell Horne <mhorne@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r367356 - head/sys/riscv/riscv
Message-ID:  <202011050052.0A50qrDQ013152@repo.freebsd.org>

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Author: mhorne
Date: Thu Nov  5 00:52:52 2020
New Revision: 367356
URL: https://svnweb.freebsd.org/changeset/base/367356

Log:
  riscv: set kernel_pmap hart mask more precisely
  
  In pmap_bootstrap(), we fill kernel_pmap->pm_active since it is
  invariably active on all harts. However, this marks it as active even
  for harts that don't exist in the system, which can cause issue when the
  mask is passed to the SBI firmware via sbi_remote_sfence_vma().
  Specifically, the SBI spec allows SBI_ERR_INVALID_PARAM to be returned
  when an invalid hart is set in the mask.
  
  The latest version of OpenSBI does not have this issue, but v0.6 does,
  and this is triggering a recently added KASSERT in CI. Switch to only
  setting bits in pm_active for harts that enter the system.
  
  Reported by:	Jenkins
  Reviewed by:	markj
  Differential Revision:	https://reviews.freebsd.org/D27080

Modified:
  head/sys/riscv/riscv/mp_machdep.c
  head/sys/riscv/riscv/pmap.c

Modified: head/sys/riscv/riscv/mp_machdep.c
==============================================================================
--- head/sys/riscv/riscv/mp_machdep.c	Wed Nov  4 23:29:27 2020	(r367355)
+++ head/sys/riscv/riscv/mp_machdep.c	Thu Nov  5 00:52:52 2020	(r367356)
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/systm.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
+#include <sys/cpuset.h>
 #include <sys/kernel.h>
 #include <sys/ktr.h>
 #include <sys/malloc.h>
@@ -265,6 +266,9 @@ init_secondary(uint64_t hart)
 
 	/* Enable external (PLIC) interrupts */
 	csr_set(sie, SIE_SEIE);
+
+	/* Activate this hart in the kernel pmap. */
+	CPU_SET_ATOMIC(hart, &kernel_pmap->pm_active);
 
 	/* Activate process 0's pmap. */
 	pmap_activate_boot(vmspace_pmap(proc0.p_vmspace));

Modified: head/sys/riscv/riscv/pmap.c
==============================================================================
--- head/sys/riscv/riscv/pmap.c	Wed Nov  4 23:29:27 2020	(r367355)
+++ head/sys/riscv/riscv/pmap.c	Thu Nov  5 00:52:52 2020	(r367356)
@@ -573,7 +573,12 @@ pmap_bootstrap(vm_offset_t l1pt, vm_paddr_t kernstart,
 
 	rw_init(&pvh_global_lock, "pmap pv global");
 
-	CPU_FILL(&kernel_pmap->pm_active);
+	/*
+	 * Set the current CPU as active in the kernel pmap. Secondary cores
+	 * will add themselves later in init_secondary(). The SBI firmware
+	 * may rely on this mask being precise, so CPU_FILL() is not used.
+	 */
+	CPU_SET(PCPU_GET(hart), &kernel_pmap->pm_active);
 
 	/* Assume the address we were loaded to is a valid physical address. */
 	min_pa = max_pa = kernstart;



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