Date: Wed, 31 Oct 2012 23:42:10 +0000 From: Attilio Rao <attilio@freebsd.org> To: Jim Harris <jim.harris@gmail.com> Cc: Ian Lepore <freebsd@damnhippie.dyndns.org>, Adrian Chadd <adrian@freebsd.org>, src-committers@freebsd.org, Andre Oppermann <andre@freebsd.org>, svn-src-all@freebsd.org, svn-src-head@freebsd.org, Peter Jeremy <peter@rulingia.com> Subject: Re: svn commit: r242402 - in head/sys: kern vm Message-ID: <CAJ-FndDnuAHDmXiyb7%2B2VwmYckhYYFPCAun8HJPhem2k08vOUQ@mail.gmail.com> In-Reply-To: <CAJP=Hc_uSMPmgU9H6BxifJ-bvP05Gi%2BX6PrycG%2B-3xoHLaZKhg@mail.gmail.com> References: <201210311807.q9VI7IcX000993@svn.freebsd.org> <CAJ-FndDRkBS57e9mzZoJWX5ugJ0KBGxhMSO50KB8Wm8MFudjCA@mail.gmail.com> <1351707964.1120.97.camel@revolution.hippie.lan> <CAJ-FndC7QwpNAjzQTumqTY6Sj_RszXPwc0pbHv2-pRGMqbw0ww@mail.gmail.com> <CAJ-VmokqEFX4wQYh-ojo3kcWUPj5L-V_k0Nj-u3sQByVypkDFw@mail.gmail.com> <CAJ-FndCL7bpkbfaaR%2BaYQAxEBDmgip0QbrE5JhwnbTicSraz9g@mail.gmail.com> <20121031193020.GJ3309@server.rulingia.com> <1351712425.1120.109.camel@revolution.hippie.lan> <50918AAD.2090906@freebsd.org> <CAJ-FndADYhn6yOEmR91-h0kUVxPZoOm34NwKUGrtYwvaWCXrFQ@mail.gmail.com> <CAJP=Hc_uSMPmgU9H6BxifJ-bvP05Gi%2BX6PrycG%2B-3xoHLaZKhg@mail.gmail.com>
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On Wed, Oct 31, 2012 at 11:25 PM, Jim Harris <jim.harris@gmail.com> wrote: > > > On Wed, Oct 31, 2012 at 3:55 PM, Attilio Rao <attilio@freebsd.org> wrote: >> >> On Wed, Oct 31, 2012 at 8:31 PM, Andre Oppermann <andre@freebsd.org> >> wrote: >> > You can define CACHE_LINE_SIZE to 0 on those platforms. >> > Or to make it even more granular there could be a CACHE_LINE_SIZE_LOCKS >> > that is used for lock padding. >> >> I think that this is a bright idea, albeit under the condition that >> just like CACHE_LINE_SIZE it won't change during STABLE branches >> timeframe and that it must not be dependent by SMP option. >> >> What do you think about this patch?: >> http://www.freebsd.org/~attilio/cache_line_size_locks.patch > > > Should CACHE_LINE_SIZE_LOCKS still be defined as CACHE_LINE_SIZE on arm, > mips, etc. if SMP is enabled? This would ensure the padding that used to be > there in vpglock doesn't go away. As first thing, I'm strongly against having SMP-dependant lock sizes, as said so I won't be happy with whatever patch that changes lock sizes based on the SMP option presence or not. Said that, I'm not really sure if pad-aligned locks have the same performance weight on !Intel architectures. I suspect not. If this is not the case (then pad-aligned are important on some architectures where I used the 1 value) I just say to go and use CACHE_ALIGN_SIZE for them. I think the whole point of this patch was to prevent !Intel (or most of them, namely MIPS and ARM) architectures to avoid the pad-aligned effect at all, otherwise this patch looks moot to me. Said that, this changes completely the meaning of pad-align locks. If this patch goes in it switches from "mutexes padded and aligned to the cache line size" to "mutexes which can be padded and aligned if the architecture can have a real benefit from doing so". > I'm also wondering if this should be named something different, perhaps > LOCK_ALIGNMENT. I don't really mind whatever name you are happier with, so just pick up one. Attilio -- Peace can only be achieved by understanding - A. Einstein
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