Date: Thu, 1 Jun 2006 07:49:05 GMT From: Kevin Lo <kevlo@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 98259 for review Message-ID: <200606010749.k517n5Ad062881@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=98259 Change 98259 by kevlo@kevlo_rtsl on 2006/06/01 07:48:52 Let FS2410 compile. Affected files ... .. //depot/projects/arm/src/sys/arm/conf/FS2410#1 add .. //depot/projects/arm/src/sys/arm/s3c2xx0/fs2410_machdep.c#2 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#4 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0var.h#2 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/std.fs2410#2 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/std.s3c2410#3 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/uart_dev_s3c2410.c#2 edit Differences ... ==== //depot/projects/arm/src/sys/arm/s3c2xx0/fs2410_machdep.c#2 (text+ko) ==== @@ -154,7 +154,7 @@ #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ #define KERNEL_PT_BEFOREKERN 1 #define KERNEL_PT_AFKERNEL 2 /* L2 table for mapping after kernel */ -#define KERNEL_PT_AFKERNEL_NUM 9 +#define KERNEL_PT_AFKERNEL_NUM 6 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */ #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM) @@ -176,6 +176,8 @@ extern void *_end; +int got_mmu = 0; + extern vm_offset_t sa1_cache_clean_addr; extern int *end; @@ -273,6 +275,18 @@ #undef _A #undef _S +struct arm32_dma_range * +bus_dma_get_range(void) +{ + return (NULL); +} + +int +bus_dma_get_range_nb(void) +{ + return (0); +} + static inline pd_entry_t * read_ttb(void) { @@ -292,6 +306,10 @@ #define SDRAM_START 0x30000000 +#ifdef DDB +extern vm_offset_t ksym_start, ksym_end; +#endif + void * initarm(void *arg, void *arg2) { @@ -309,7 +327,7 @@ int i = 0; uint32_t fake_preload[35]; - uint32_t memsize = 64 * 1024 * 1024; + uint32_t memsize = 32 * 1024 * 1024; i = 0; @@ -486,7 +504,7 @@ * map those registers at the same address in the kernel page * table. */ - pmap_devmap_bootstrap((vaddr_t)read_ttb(), fs2410_devmap); + pmap_devmap_bootstrap((vm_offset_t)read_ttb(), fs2410_devmap); /* Disable all peripheral interrupts */ ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0); @@ -509,6 +527,7 @@ /* Enable MMU, I-cache, D-cache, write buffer. */ + got_mmu = 1; arm_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); pmap_curmaxkvaddr = afterkern + PAGE_SIZE; ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#4 (text+ko) ==== @@ -48,6 +48,8 @@ #include <arm/s3c2xx0/s3c2410var.h> #include <sys/rman.h> +#define S3C2XX0_XTAL_CLK 12000000 + #define IPL_LEVELS 13 u_int irqmasks[IPL_LEVELS]; @@ -158,12 +160,14 @@ S3C24X0_TIMER_SIZE, 0, &sc->sc_timer_ioh)) panic("cannot map TIMER"); +#if 0 /* calculate current clock frequency */ s3c24x0_clock_freq(&sc->sc_sx); printf(": fclk %d MHz hclk %d MHz pclk %d MHz", sc->sc_sx.sc_fclk / 1000000, sc->sc_sx.sc_hclk / 1000000, sc->sc_sx.sc_pclk / 1000000); printf("\n"); +#endif /* get busdma tag for the platform */ } ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0var.h#2 (text+ko) ==== @@ -41,7 +41,7 @@ bus_space_handle_t sc_timer_ioh; /* Timer control registers */ }; -#if 0 void s3c24x0_clock_freq(struct s3c2xx0_softc *); -#endif +void s3c24x0_clock_freq2(vm_offset_t, int *, int *, int *); + #endif /* _ARM_S3C24X0VAR_H_ */ ==== //depot/projects/arm/src/sys/arm/s3c2xx0/std.fs2410#2 (text+ko) ==== @@ -1,5 +1,5 @@ #$FreeBSD$ -include "../s3c2xx0/std.s3c2xx0" +include "../s3c2xx0/std.s3c2410" files "../s3c2xx0/files.fs2410" makeoptions KERNPHYSADDR=0x30200000 ==== //depot/projects/arm/src/sys/arm/s3c2xx0/std.s3c2410#3 (text+ko) ==== @@ -1,4 +1,4 @@ # $FreeBSD$ -file "../s3c2xx0/files.s3c2xx0" +files "../s3c2xx0/files.s3c2xx0" cpu CPU_ARM9 ==== //depot/projects/arm/src/sys/arm/s3c2xx0/uart_dev_s3c2410.c#2 (text+ko) ==== @@ -114,16 +114,16 @@ if (bas->rclk == 0) bas->rclk = DEFAULT_RCLK; uart_setreg(bas, SSCOM_ULCON, 0x23); - uart_setdreg(bas, SSCOM_UCON, 0); + uart_setreg(bas, SSCOM_UCON, 0); uart_setreg(bas, SSCOM_UFCON, UFCON_TXTRIGGER_8 | UFCON_RXTRIGGER_8 | UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET | UFCON_FIFO_ENABLE); brd = sscomspeed(baudrate, bas->rclk); - uart_setdreg(bas, SSCOM_UBRDIV, brd); + uart_setreg(bas, SSCOM_UBRDIV, brd); /* Enable UART. */ - uart_setdreg(bas, SSCOM_UCON, UCON_TXMODE_INT|UCON_RXMODE_INT); - uart_setdreg(bas, SSCOM_UMCON, UMCON_RTS); + uart_setreg(bas, SSCOM_UCON, UCON_TXMODE_INT|UCON_RXMODE_INT); + uart_setreg(bas, SSCOM_UMCON, UMCON_RTS); } static void
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