Date: Tue, 2 Jan 2007 11:40:21 GMT From: Jason Young <jyoung@spaceball1.doogles.com> To: freebsd-bugs@FreeBSD.org Subject: Re: kern/85886: [an] an0: timeouts with Cisco 350 minipci Message-ID: <200701021140.l02BeLvK098765@freefall.freebsd.org>
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The following reply was made to PR kern/85886; it has been noted by GNATS. From: Jason Young <jyoung@spaceball1.doogles.com> To: bug-followup@FreeBSD.org Cc: Subject: Re: kern/85886: [an] an0: timeouts with Cisco 350 minipci Date: Tue, 2 Jan 2007 06:37:06 -0500 (EST) I've been continuing to hack around on the an(4) driver, trying to get the multiple rx/tx descriptor modes working, looking at the work done in the NetBSD camp to fully use the net80211 infrastructure, see if WPA can be made to work, etc etc. Slow going, and I'm not sure I'll get much further at my skill level. So in the meantime, here is the minimum change necessary to get the MPI350 working with the card running recent firmware. This change has been tested with most of the firmware versions currently downloadable from Cisco, and it should be a no-op for Aironet hardware other than the MPI350. These diffs are against -HEAD as of today. -jyoung *** /sys/dev/an/if_anreg.h Fri Jun 10 12:49:03 2005 --- ./if_anreg.h Sat Jan 6 00:59:09 2007 *************** *** 392,409 **** #define AN_HEADERTYPE_80211 0x0008 #define AN_PAYLOADTYPE_ETHER 0x0000 #define AN_PAYLOADTYPE_LLC 0x0010 ! #define AN_TXCTL_80211 \ ! (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_80211| \ ! AN_PAYLOADTYPE_LLC|AN_TXCTL_NORELEASE) ! #define AN_TXCTL_8023 \ ! (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_8023| \ ! AN_PAYLOADTYPE_ETHER|AN_TXCTL_NORELEASE) #define AN_TXGAP_80211 0 #define AN_TXGAP_8023 0 struct an_802_3_hdr { u_int16_t an_8023_status; --- 392,419 ---- #define AN_HEADERTYPE_80211 0x0008 #define AN_PAYLOADTYPE_ETHER 0x0000 #define AN_PAYLOADTYPE_LLC 0x0010 ! #define AN_TXCTL_80211 (AN_HEADERTYPE_80211|AN_PAYLOADTYPE_LLC) ! #define AN_TXCTL_8023 (AN_HEADERTYPE_8023|AN_PAYLOADTYPE_ETHER) + /* + * Hardware-specific additions to the transmit control bits. + * + * The MPI350 behaves poorly when the transmit-interrupt control bits are + * set. Firmware revision 5.02.XX and newer wouldn't reliably acknowledge + * transmits. Revisions 5.00.03 and below seem to let us get away with it. + * Revisions 5.00.03, 5.30.17 and 5.60.21 all test fine if we don't set + * those bits. This is probably related to the DMA transmit and receive + * methods specific to the MPI350. + */ + + #define AN_TXCTL_HW(x) ( x ? (AN_TXCTL_NORELEASE) : \ + (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_TXCTL_NORELEASE)) + #define AN_TXGAP_80211 0 #define AN_TXGAP_8023 0 struct an_802_3_hdr { u_int16_t an_8023_status; *** /sys/dev/an/if_an.c Mon Nov 6 08:41:50 2006 --- ./if_an.c Sat Jan 6 00:49:19 2007 *************** *** 2636,2646 **** m_copydata(m0, sizeof(struct ether_header) - 2 , tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); ! txcontrol = AN_TXCTL_8023; /* write the txcontrol only */ an_write_data(sc, id, 0x08, (caddr_t)&txcontrol, sizeof(txcontrol)); /* 802_3 header */ --- 2636,2646 ---- m_copydata(m0, sizeof(struct ether_header) - 2 , tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); ! txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); /* write the txcontrol only */ an_write_data(sc, id, 0x08, (caddr_t)&txcontrol, sizeof(txcontrol)); /* 802_3 header */ *************** *** 2699,2709 **** m_copydata(m0, sizeof(struct ether_header) - 2 , tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); ! txcontrol = AN_TXCTL_8023; /* write the txcontrol only */ bcopy((caddr_t)&txcontrol, &buf[0x08], sizeof(txcontrol)); /* 802_3 header */ --- 2699,2709 ---- m_copydata(m0, sizeof(struct ether_header) - 2 , tx_frame_802_3.an_tx_802_3_payload_len, (caddr_t)&sc->an_txbuf); ! txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350); /* write the txcontrol only */ bcopy((caddr_t)&txcontrol, &buf[0x08], sizeof(txcontrol)); /* 802_3 header */
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